Power MOSFET Hard Mask CMP Stop Layer for Thickness Uniformity
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Solution Overview
Problem
Existing methods for manufacturing power MOSFETs face challenges in reducing crystal defects and thickness variations during embedded epitaxial growth, particularly due to differences in thermal expansion coefficients between hard masks and silicon substrates, and difficulties in achieving sufficient flattening using dry etch back techniques.
Innovation Solution
A manufacturing method involving primary and secondary CMP treatments, where a hard mask film is left in a scribe region as a CMP stopper for initial polishing and then removed, allowing for reduced crystal defects and improved thickness uniformity without complicating the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a hard mask film is left during embedded epitaxial growth to serve as a CMP stopper, then thickness variations can be absorbed and flattening can be achieved, but crystal defects occur near the surface due to thermal expansion coefficient differences
Solution Approach 1:
The patent divides the hard mask film removal process into two stages: first removing the hard mask film from cell regions while leaving it in scribe regions, then completely removing it later. This segmentation allows the hard mask to serve as a CMP stopper during epitaxial growth without causing crystal defects in the device regions, as the hard mask is already removed from those areas.
Solution Approach 2:
The patent applies different treatments to different regions: in cell regions, the hard mask film is removed before epitaxial growth to prevent crystal defects, while in scribe regions, the hard mask film is retained to serve as a CMP stopper for thickness uniformity. This local differentiation resolves the contradiction between preventing crystal defects and achieving flattening.
2Object-affected harmful factors
If the hard mask film is completely removed before embedded epitaxial growth, then crystal defects are avoided, but thickness variations cannot be absorbed and flattening becomes difficult
Solution Approach 1:
The patent segments the wafer into cell regions and scribe regions, applying different hard mask removal strategies to each. Cell regions have the hard mask removed early to prevent crystal defects, while scribe regions retain the hard mask to provide CMP stopping capability for thickness control.
Solution Approach 2:
Different regions receive different treatments: cell regions undergo hard mask removal to ensure defect-free epitaxial growth, while scribe regions maintain the hard mask for CMP process control. This localized approach allows both objectives to be achieved simultaneously in different areas.
3Ease of manufacture
If dry etch back is used for flattening after embedded epitaxial growth, then the process can be simplified, but sufficient flattening cannot be achieved
Solution Approach 1:
The patent introduces a CMP process as an intermediary step between epitaxial growth and subsequent processing. The CMP process, using the hard mask film in scribe regions as a stopper, effectively flattens the surface by removing thickness variations without requiring complex etch back procedures.
Solution Approach 2:
The patent changes the flattening mechanism from mechanical etch back to chemical-mechanical polishing. By controlling the CMP process with the hard mask film as a stopper, the patent achieves superior flatness control compared to dry etch back methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces crystal defects in cell regions while maintaining flatness, absorbing thickness variations and ensuring uniformity in the epitaxial growth, thereby enhancing the quality and performance of power MOSFETs.
Implementation Method 1
performing a first CMP treatment on a first main surface of the semiconductor wafer by using the CMP stop film as a CMP stopper
Implementation Method 2
depositing, in a state where the CMP stop film is present in the scribe region, an embedded epitaxy layer of a second conductivity type opposite to the first conductivity type, over the first main surface of the semiconductor wafer by embedded epitaxial growth
Data Source
AI summary
A manufacturing method of a power MOSFET employs a hard mask film over a portion of the wafer surface as a polishing stopper, between two successive polishing steps. After embedded epitaxial growth is performed in a state where a hard mask film for forming trenches is present in at least a scribe region of a wafer, primary polishing is performed by using the hard mask film as a stopper, and secondary polishing is then performed after the hard mask film is removed.