MOSFET and Dual-Gate JFET Cascode for High Breakdown Voltage
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Solution Overview
Problem
Conventional semiconductor devices face a tradeoff between improved RF performance and higher breakdown voltage, limiting their usefulness in power applications, and existing solutions either compromise on voltage swing or introduce higher on-state resistance.
Innovation Solution
The development of double-gate semiconductor devices with a combination of metal-oxide-semiconductor (MOS) and junction gates, where the breakdown voltage is the sum of individual gate breakdown voltages, allowing for high breakdown voltage and improved RF capability while maintaining high power levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If gate geometries are reduced to improve RF performance, then RF capability is improved, but breakdown voltage decreases
Solution Approach 1:
The device is divided into two separate transistor components: a first transistor (MOSFET) optimized for RF performance with smaller gate geometry, and a second transistor (JFET or MESFET) optimized for high breakdown voltage. This segmentation allows each component to be independently optimized for its specific function while working together in a cascode configuration to achieve both improved RF capability and high breakdown voltage.
2Power
If current drive is increased to compensate for lower voltage swing, then power output may be maintained, but transistor width must be increased creating undesired capacitive load
Solution Approach 1:
The power amplification function is segmented between two transistors: the first transistor handles the RF signal amplification with moderate current drive, while the second transistor provides high breakdown voltage capability and additional current drive. This segmentation allows the system to achieve high power output without requiring excessive width in a single transistor, thereby reducing the capacitive load on the driving circuit.
3Strength
If LDMOS transistors are used to increase breakdown voltage, then breakdown voltage is improved, but on-state resistance increases
Solution Approach 1:
The invention changes the device structure from a single LDMOS transistor to a cascode configuration with two different transistor types. The second transistor (JFET or MESFET) has different material and structural parameters that provide high breakdown voltage with lower on-state resistance compared to LDMOS. This parameter change in the second transistor compensates for the high on-state resistance that would result from using LDMOS alone.
4Strength
If thicker and higher resistivity substrates are used to achieve higher voltage performance, then breakdown voltage is improved, but on-state losses increase
Solution Approach 1:
Instead of changing substrate parameters (thickness and resistivity) to achieve high breakdown voltage, the invention changes the device architecture to a cascode configuration. The second transistor (JFET or MESFET) provides high breakdown voltage capability with lower on-state losses compared to using thicker and higher resistivity substrates in a single-transistor configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The double-gate semiconductor devices provide a high breakdown voltage and improved RF performance, enabling effective power amplification and operation at higher power levels compared to conventional CMOS devices.
Implementation Method 1
The gates of the MOSFET and of the JFET are coupled together and controlled by a signal
Implementation Method 2
The electronic circuit comprises a metal-oxide-semiconductor field effect transistor (MOSFET) and a junction field effect transistor (JFET) connected together in a cascode configuration, wherein the breakdown voltage of the electronic circuit is the sum of the breakdown voltages of the MOSFET and of the JFET
Data Source
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AI summary
Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.