Core MOSFET Level Shifter With Voltage Clamping for I/O Reliability
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Solution Overview
Problem
High density integrated circuits, such as system-on-a-chip (SOC) and 3D ICs, face challenges in level shifting between core and I/O voltages, where core devices are susceptible to overstressing when operated at I/O voltage levels, leading to potential damage and reliability issues.
Innovation Solution
A level shifter implemented using core device MOSFETs with voltage clamping elements, where the threshold voltage is set greater than the difference between the I/O and core voltage ranges, preventing overstressing by constraining output voltages within safe operating levels, and utilizing a combination of NMOS and PMOS transistors to manage signal transitions between core and I/O voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If core devices are operated at I/O voltage levels to meet I/O demands, then I/O signaling capability is improved, but the core devices become overstressed and susceptible to damage
Solution Approach 1:
A level shifter circuit is introduced as an intermediary component between the core logic and I/O buffers. This level shifter converts I/O voltage level signals to core voltage level signals, allowing the I/O buffers to operate at higher voltages for strong signaling capability while the core logic devices remain protected and operate at their lower, safe voltage levels.
2Power
If separate I/O devices are used to interface core devices to high capacitance components, then I/O performance is improved, but device complexity and area increase
Solution Approach 1:
The level shifter circuit merges the voltage level conversion function with the existing I/O buffer structure. By integrating the level shifter between the core logic and I/O buffers, the system achieves both high voltage I/O capability and core protection without requiring completely separate I/O devices, thus reducing overall device complexity and area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively converts core voltage signals to I/O voltage levels without overstressing the MOSFETs, ensuring reliable operation across various process corners and reducing tapeout mask costs, fabrication times, and required circuit area, while eliminating the need for extra middle-bias-voltage and ESD protection devices.
Implementation Method 1
A level shifter implemented using core device MOSFETs with voltage clamping elements, where the threshold voltage is set greater than the difference between the I/O and core voltage ranges, preventing overstressing by constraining output voltages within safe operating levels
Implementation Method 2
A level shifter implemented using core device MOSFETs with voltage clamping elements, where the threshold voltage is set greater than the difference between the I/O and core voltage ranges
Data Source
AI summary
A level shifter for converting between voltages of a core voltage range to voltages within a larger I/O voltage range. The level shifter has interconnected transistors implemented as core devices operable within the core voltage range. The level shifter is connected to first and second power connections at the I/O voltage range. A voltage clamping element implemented as a core device has a threshold voltage greater than or equal to the difference between the I/O voltage range and the core voltage range and configured to prevent overstressing the transistors with voltages beyond the core voltage range. The input to the level shifter is within the core voltage range. The level shifter output signal has a high level at the high voltage of the I/O voltage range and a low level at approximately one threshold voltage above the low voltage level of the core voltage range.