Integrated Metal Shield for MOSFET Capacitance Reduction
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing drain-to-gate capacitance and increasing breakdown voltage, as current methods require additional polysilicon layers and complex etching processes, which complicate the manufacturing of MOSFETs.
Innovation Solution
An integrated metal shield is formed using a metallic shield contact via and source contact extension, isolated by a shield isolation layer, which reduces drain-to-gate capacitance and increases breakdown voltage without requiring additional polysilicon layers or complex etching over the MOSFET topology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a shield is formed by depositing an additional polysilicon layer over the extended gate electrode spacer, then drain-to-gate capacitance is reduced and breakdown voltage is increased, but the manufacturing process complexity increases due to additional polysilicon process steps and complex etching requirements
Solution Approach 1:
The patent extracts the shield formation from the polysilicon layer deposition process and implements it using the existing metal layer instead. The metal shield is formed by patterning the metal layer that is already deposited for other purposes, eliminating the need for additional polysilicon deposition and simplifying the manufacturing process while maintaining the shield's functionality in reducing drain-to-gate capacitance and increasing breakdown voltage
Solution Approach 2:
The metal layer is given multiple functions: it serves both as the standard metal interconnect layer and as the shield material. By making the metal layer multi-functional, the patent eliminates the need for a separate polysilicon shield layer, reducing manufacturing complexity while achieving the same electrical performance benefits
2Reliability
If a shield is formed by depositing an additional polysilicon layer, then drain-to-gate capacitance is reduced, but the manufacturing time and process steps increase
Solution Approach 1:
The patent merges the shield formation step with the existing metal layer deposition and patterning processes. Instead of adding a separate polysilicon shield formation sequence, the shield is created as part of the metal layer processing, combining multiple functions into a single integrated process flow that improves manufacturing efficiency while achieving the desired capacitance reduction
3Ease of manufacture
If etching is performed over the complex MOSFET topology to create the shield, then the shield can be formed, but the etching process complexity increases
Solution Approach 1:
Instead of forming the shield by etching away material from a polysilicon layer deposited over the complex MOSFET topology, the patent inverts the approach by forming the shield through metal layer patterning. This inversion simplifies the etching process because the metal layer is already present and can be patterned using standard photolithography and etching techniques that are less complex than etching through multiple polysilicon layers and spacers
Data Source
AI summary
The present invention relates to a semiconductor device having an integrated metal shield. The shield, created as part of a MOSFET, is formed about a gate electrode of the MOSFET to effectively reduce drain-to-gate capacitance and increase breakdown voltage. The shield consists of a metallic shield contact via and a source contact extension. The metallic shield contact via, formed between the gate electrode and a drain region of the MOSFET, may be either a series of closely spaced vias or a wide continuous via. The metallic shield contact via is isolated from the surface of a semiconductor wafer by a shield isolation layer at one end. The metallic shield contact via is electrically coupled to the source contact extension at the other end. The source contact extension is metallic, and may be formed from the same metal used to create a source contact and a drain contact for the MOSFET.