Offset-Diffusion MOSFET Structure for Breakdown Voltage and Current Optimization
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Solution Overview
Problem
Conventional depletion-type MOSFETs face challenges in maintaining breakdown voltage characteristics while adjusting saturation current, leading to limited flexibility in impurity concentration optimization and size reduction.
Innovation Solution
A semiconductor device with a specific structure including a p-type well region, n+-type source and drain regions, and offset-diffusion regions with varying impurity concentrations and depths, utilizing a LOCOS film to separate the gate electrode from the drain region and incorporating a second n-type offset-diffusion region to optimize impurity concentration beneath the gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the n-type offset-diffusion-region is extended over the whole active region to form depletion-type MOSFET, then the saturation current can be maintained, but the breakdown voltage characteristics deteriorate due to inability to optimize impurity concentration independently
Solution Approach 1:
The offset-diffusion region is segmented into two distinct regions: a first n-type offset-diffusion region beneath the drain region and a second n-type offset-diffusion region beneath the gate electrode. This segmentation allows independent optimization of impurity concentrations in each region, enabling maintenance of saturation current while preserving breakdown voltage characteristics.
Solution Approach 2:
Different impurity concentrations are assigned to different locations within the offset-diffusion regions. The first n-type offset-diffusion region has a first impurity concentration optimized for saturation current, while the second n-type offset-diffusion region has a second impurity concentration optimized for breakdown voltage. This local quality differentiation resolves the contradiction between current and voltage characteristics.
2Reliability
If the offset gate structure is configured to separate the gate electrode from the drain region, then the breakdown voltage is improved, but the device size increases
Solution Approach 1:
The offset-diffusion regions are formed in the depth dimension beneath the surface, extending from the surface toward the interior of the semiconductor substrate. This vertical dimensionality allows the offset structure to provide breakdown voltage enhancement without increasing the lateral footprint of the device, thus resolving the size-voltage contradiction.
3Productivity
If the impurity concentration of the n-type offset-diffusion-region is adjusted to optimize saturation current, then the current capacity is improved, but the breakdown voltage characteristics are compromised
Solution Approach 1:
The offset-diffusion region is divided into two segments with different impurity concentrations: the first segment beneath the drain and the second segment beneath the gate. This allows the first segment to be optimized for current capacity while the second segment maintains breakdown voltage characteristics, resolving the productivity-reliability contradiction.
Solution Approach 2:
The impurity concentration is made location-dependent within the offset-diffusion structure. The first n-type offset-diffusion region has a higher impurity concentration for current optimization, while the second region has a lower impurity concentration for voltage optimization. This local quality variation enables simultaneous achievement of high current capacity and reliable breakdown voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration maintains high breakdown voltage and allows for flexible adjustment of saturation current, promoting size reduction and improving circuit characteristics without adverse effects on breakdown voltage.
Implementation Method 1
a local dielectric film disposed selectively on the surface layer of the part sandwiched between the second semiconductor region and the third semiconductor region in the fourth semiconductor region
Implementation Method 2
an n-type offset-diffusion-region disposed so as to cover the whole surface of an n+-type drain region at the lower side thereof
Data Source
AI summary
A semiconductor device can ensure predetermined current capacity under maintaining breakdown voltage characteristics and can promote size reduction. A first n-type offset-diffusion-region is disposed inside a p-type well region. In the first n-type offset-diffusion-region, a LOCOS film is disposed on the surface layer of a part sandwiched between an n+-type drain region and n+-type source region. In the first n-type offset-diffusion-region, a gate electrode is disposed on the part sandwiched between the LOCOS film and the n+-type source region. In the first n-type offset-diffusion-region, impurity concentration is lower at the part beneath the gate electrode than at the part beneath the LOCOS film. Inside the first n-type offset-diffusion-region, a second n−-type offset-diffusion-region is disposed at apart located toward the n+-type source region through the LOCOS film so as to be separated from the LOCOS film by a distance x.