MOSFET Pixel Circuit for Grayscale Control in High-Resolution Displays
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Solution Overview
Problem
Existing display devices, particularly Head Mounted Displays (HMDs), require high-resolution panels that current pixel technologies struggle to meet, especially in efficiently managing power sources and transistors to achieve optimal image quality and reduced power consumption.
Innovation Solution
A pixel design incorporating a MOSFET transistor with a body electrode, featuring a specific configuration of transistors and capacitors, along with a power management system that includes multiple power sources and scan drivers, to manage voltage levels and transistor states during different periods, ensuring efficient light emission and grayscale expression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high-resolution panel is applied to HMD, then image quality is improved, but power consumption increases and transistor management becomes more complex
Solution Approach 1:
The pixel circuit is divided into multiple specialized transistors (first transistor for current control, second transistor for data signal input, third transistor for power supply control, fourth transistor for initialization) and capacitors (first capacitor for threshold voltage compensation, second capacitor for data signal holding). This segmentation allows each component to perform its function efficiently, reducing overall power consumption while maintaining high-resolution image quality.
Solution Approach 2:
The patent employs multiple power sources with different voltage levels (first power source, second power source, third power source) to dynamically control transistor states. By changing voltage parameters selectively during different periods (first period for initialization, second period for data writing, third period for light emission), the circuit optimizes power consumption while preserving image quality.
2Use of energy by moving object
If multiple transistors and capacitors are added to manage power sources, then power consumption is reduced, but device complexity increases
Solution Approach 1:
Each transistor in the circuit serves multiple functions across different time periods. For example, the first transistor controls both threshold voltage compensation during the first period and current control during the third period. The second transistor handles both data signal input and initialization. This multi-functionality reduces the need for additional components, managing complexity while achieving power reduction.
Solution Approach 2:
The circuit operates in distinct periodic phases: first period for initialization and threshold voltage compensation, second period for data signal writing, and third period for light emission. During each period, specific transistors are activated or deactivated based on the required function. This periodic operation allows complex multi-transistor circuits to be managed systematically, with each component having defined activation windows that reduce overall power consumption.
3Measurement precision
If threshold voltage compensation is implemented, then grayscale expression is improved, but manufacturing precision requirements increase
Solution Approach 1:
The first capacitor is connected to hold the threshold voltage of the first transistor, creating a feedback mechanism that compensates for threshold voltage variations. During the first period, the first transistor operates in a saturation region to charge the first capacitor with the threshold voltage value. This captured threshold voltage is then used to compensate for variations in subsequent operation, improving grayscale expression without requiring extremely tight manufacturing tolerances on transistor threshold voltages.
Data Source
AI summary
A pixel includes: a first transistor including a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node; a second transistor connected between a data line and the second node, the second transistor including a gate electrode electrically connected to a first scan line; a third transistor connected between a first power line to which a voltage of a first driving power source is supplied and the first node, the third transistor including a gate electrode electrically connected to an emission control line; a first capacitor connected between the first node and the third node; a second capacitor connected between the second node and the third node; and a light emitting element connected between the second node and a second power line to which a voltage of a second driving power source is supplied.


