MOSFET Pseudo Resistor Circuit for Stable Low-Frequency Charge Amplifiers

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Solution Overview

Problem

Existing charge amplifiers using pseudo resistor circuits face challenges with high-resistance element integration, size reduction, and waveform distortion due to variations in manufacturing processes, power supply voltage, and temperature, requiring additional adjustment circuits.

Innovation Solution

A pseudo resistor circuit configuration that stabilizes the pseudo resistance value of a field effect transistor using a voltage dividing circuit, absolute value circuit, and floating voltage sources, eliminating the need for additional adjustment circuits and reducing waveform distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-resistance element of several tens megaohms or larger is mounted to reduce the cutoff frequency, then the cutoff frequency is reduced, but the size of the entire circuit configuration increases

Engineering Contradiction:
Improvecutoff frequencyVSAvoidcircuit size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the resistance parameter by using a MOSFET operated in the weak inversion region, which naturally exhibits very high output resistance. This eliminates the need for separate high-resistance elements while achieving the desired low cutoff frequency, thus reducing circuit size without compromising the frequency response

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the resistance value of the MOSFET is exponentially varied depending on manufacturing process variation, power supply voltage, and temperature, then the pseudo resistance value changes, but additional adjustment circuits are required

Engineering Contradiction:
Improvepseudo resistance valueVSAvoidadjustment circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs feedback mechanisms where the drain voltage of the MOSFET is fed back to its gate through a capacitor, creating a self-regulating system. This feedback stabilizes the pseudo resistance value against variations in manufacturing processes, power supply voltage, and temperature, eliminating the need for additional adjustment circuits

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The MOSFET circuit is designed to self-stabilize its resistance characteristics through internal feedback loops and careful biasing arrangements. The circuit automatically compensates for parameter variations without requiring external adjustment components, achieving self-service stability

Inventive Principle:
Principle #25Self-service

3Reliability

If the pseudo resistance value varies with drain-source voltage, then non-linearity as the resistor is strong, but waveform distortion occurs

Engineering Contradiction:
Improveresistor linearityVSAvoidwaveform distortion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent uses feedback to linearize the MOSFET's resistance characteristics. By feeding back the drain voltage to the gate through a capacitor and using operational amplifiers to maintain virtual ground conditions, the circuit compensates for the inherent non-linearity of the MOSFET, reducing waveform distortion while maintaining the high resistance特性

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9660592B2Psuedo resistor circuit and charge amplifier
Publication Date: 2017.05.23 MURATA MFG CO LTD
  • US9660592B2 patent drawing
  • US9660592B2 patent drawing
  • US9660592B2 patent drawing

AI summary

A pseudo resistor circuit and a charge amplifier include a first field effect transistor; a second field effect transistor having electrical characteristics matched with electrical characteristics of the first field effect transistor; and a voltage dividing circuit with terminal of a reference resistor electrically connected to a source terminal of the second field effect transistor. Further, a first operational amplifier with an output terminal is connected to a gate terminal of the first field effect transistor and a gate terminal of the second field effect transistor and in which midpoint voltage of the voltage dividing circuit is input into either an inverting or non-inverting input terminal and reference voltage is input into the other of the inverting and non-inverting input terminal. Furthermore, a second operational amplifier supplies voltage resulting from inversion and amplification of drain voltage of the first field effect transistor into the other terminal of the resistor.