MOSFET RF Switch Bias Path for Better ESD Discharge
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Solution Overview
Problem
MOSFET-based RF switches face challenges in sustaining a conductive state during Electro-Static Discharge (ESD) events, leading to potential transistor damage due to excessive voltage exposure, especially with low Rg Cgs time constants or slow ESD pulses.
Innovation Solution
Incorporating a DC conductive path between the RF conductive current path and the resistive bias network through an ESD bias component, which provides a DC conductive path during ESD events and blocks it in the absence of such events, ensuring the switch can handle ESD without damaging the transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a stacked MOSFET configuration is used to achieve high voltage blocking capability, then the voltage handling capability is improved, but the ESD robustness deteriorates due to insufficient discharge current
Solution Approach 1:
The gate bias network is segmented into multiple resistive dividers (first, second, and third resistive dividers) that independently control the gate voltages of different MOSFETs in the stack. This segmentation allows independent optimization of each transistor's gate voltage during ESD events, enabling better current discharge control while maintaining the high voltage blocking capability of the stacked configuration.
Solution Approach 2:
A dedicated ESD protection circuit is introduced as an intermediary component between the stacked MOSFETs and the signal path. This circuit includes additional MOSFETs (first and second ESD protection MOSFETs) that activate during ESD events to provide alternative discharge paths, protecting the main switch transistors from excessive stress while not affecting normal operation.
2Use of energy by moving object
If the gate bias network uses high resistance values to minimize DC current consumption, then the power consumption is reduced, but the ESD discharge capability deteriorates
Solution Approach 1:
The gate bias network transitions from a static high-resistance configuration to a dynamic system where resistance values can effectively change during ESD events. The ESD protection circuit detects ESD conditions and activates low-resistance discharge paths, allowing the network to adapt its impedance characteristics based on operational conditions - maintaining low power consumption during normal operation while providing high discharge capability during ESD events.
Solution Approach 2:
The resistance parameters of the gate bias network are made variable through the ESD protection mechanism. During normal operation, high resistance values minimize DC current consumption. During ESD events, the protection circuit modifies the effective resistance by activating parallel discharge paths through the ESD protection MOSFETs, significantly increasing the discharge current capability when needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents transistor damage by maintaining the switch in a conductive state during ESD events, ensuring complete discharge and reducing the risk of overstress, thereby enhancing the RF switch's robustness and reliability.
Implementation Method 1
During an ESD voltage pulse the Cgs and Cgd capacitors of transistors N1, N2, and N3 are charged. When the gate-source voltage of all transistors in stack reaches the threshold voltage, the stacked chain starts conducting current, thus discharging the node at which ESD pulse is applied.
Data Source
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AI summary
An RF switch device includes transistors coupled in series forming an RF conductive current path; a first resistive bias network forming a DC conductive bias path between gate nodes of the plurality of transistors; and a first ESD bias component coupled between the RF conductive current path and the first resistive bias network, wherein the first ESD bias component provides a DC conductive path between the RF conductive current path of the RF switch device and the first resistive bias network during an ESD event.