MOSFET Second N-Well Region for Plasma Damage Protection
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Solution Overview
Problem
Existing metal oxide semiconductor field effect transistors (MOSFETs) face significant plasma-induced damage due to accumulated charged particles, which conventional n-well protection diodes inadequately address, especially during front-end-of-the-line (FEOL) plasma-based processes.
Innovation Solution
Incorporating a second n-well region with a greater surface area functionally connected to the first n-well region, along with isolation trenches and an optional n-well protection diode connected via a metal line, to enhance the discharge path for charged particles and protect the gate oxide.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an n-well protection diode is added to provide additional discharge path, then some charged particle discharge capability is improved, but the discharge capacity is still insufficient and gate oxide damage occurs
Solution Approach 1:
The invention divides the n-well region into two separate n-well regions: a first n-well region containing the source, drain, and substrate terminal, and a second n-well region with larger surface area dedicated to charged particle discharge. This segmentation allows each region to specialize in its function, with the second region providing enhanced discharge capacity without interfering with the normal transistor operation in the first region.
Solution Approach 2:
The invention extends the discharge capability by adding a second n-well region with larger surface area in a different spatial dimension (area expansion) rather than simply increasing the depth or modifying the existing small n-well region. This dimensional expansion provides proportionally more discharge paths for charged particles.
2Reliability
If conventional n-well protection diode is used, then limited discharge path is provided, but front-end-of-the-line plasma-based process damage is not protected
Solution Approach 1:
The second n-well region serves multiple functions: it provides discharge paths for charged particles generated during front-end-of-the-line plasma-based processes, protects the gate oxide during manufacturing, and maintains effectiveness throughout the entire fabrication process sequence. This universal protection mechanism replaces the limited conventional diode approach.
3Reliability
If charged particles accumulate in n-well region, then discharge through n-well region/substrate junction occurs, but excessive charge discharges through gate oxide causing damage
Solution Approach 1:
The second n-well region acts as an intermediary structure that intercepts and dissipates charged particles before they can accumulate and discharge through the gate oxide. It serves as a intermediate discharge zone between the plasma exposure and the vulnerable gate oxide, protecting the transistor functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents charged particle discharge through the gate oxide, maintaining MOSFET functionality and performance by increasing the discharge capacity beyond what conventional diodes can provide, especially during FEOL processes.
Implementation Method 1
Charged particles built up within the n-well region may then be discharged through the n-well region/p-type substrate junction
Implementation Method 2
an additional isolation trench formed in the first well region, the additional isolation trench isolating the substrate terminal from the source and the drain
Data Source
AI summary
A metal oxide semiconductor field effect transistor (MOSFET) for an integrated circuit includes a substrate of a first conductivity type, a first well region of a second conductivity type located in the substrate, and a second well region of the second conductivity type located within the substrate. The second well region is functionally connected to the first well region, and the second well region has a surface area greater than a surface area of the first well region. The MOSFET further includes a source of the first conductivity type located in the first well region, a drain of the first conductivity type located in the first well region, a substrate terminal of the second conductivity type located in the first well region, a gate oxide on a top surface of the first well region, and a gate electrode located on a top surface of the gate oxide.