MOSFET Contact Structure With Self-Aligned Gate and Drain/Source Links

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Solution Overview

Problem

The challenge is to effectively scale down the size of MOSFET transistors to integrate more devices on a silicon wafer while reducing manufacturing costs and avoiding misalignment issues between contact holes and gate/drain/source regions, which is complicated by the need for expensive lithography equipment and complex etching technologies.

Innovation Solution

A transistor structure is developed with self-aligned miniaturized contacts that directly connect the gate and drain/source regions, using a one-dimensional mask pattern to reduce photolithography sensitivity and misalignment, and a metal connection layer that fills concave structures to minimize feature size and enhance alignment precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional contact-hole masks with two-dimensional patterns are used to define contact holes for gate/drain/source regions, then contact holes can be formed to connect transistor regions, but misalignment between contact holes and transistor regions occurs and photolithography sensitivity increases as feature size shrinks

Engineering Contradiction:
Improvealignment precision between contact holes and transistor regionsVSAvoidcomplexity of photolithography process and mask patterns
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent transitions from using two-dimensional mask patterns to a one-dimensional mask pattern (strip pattern) that extends along the channel length direction. This dimensional simplification reduces photolithography sensitivity and misalignment issues while maintaining precise definition of contact hole positions relative to gate, drain, and source regions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact hole formation process is segmented into distinct regions: a first contact hole over the gate region, a second contact hole over the drain region, and a third contact hole over the source region. Each contact hole is independently defined by the strip mask pattern, allowing precise control of each connection point without requiring complex multi-dimensional mask alignment.

Inventive Principle:
Principle #1Segmentation

2Productivity

If minimum feature size is reduced to scale down transistor dimensions, then more transistors can be integrated on a silicon wafer, but expensive lithography equipment and complex etching technologies are required

Engineering Contradiction:
Improveintegration density of transistors on silicon waferVSAvoidmanufacturing cost and process complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

By using a one-dimensional strip mask pattern instead of complex two-dimensional patterns, the photolithography process becomes less sensitive to alignment errors and requires less sophisticated equipment. This enables scaling to smaller feature sizes without proportionally increasing manufacturing complexity and cost.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The strip mask pattern automatically defines the positions of multiple contact holes (over gate, drain, and source regions) in a single photolithography step. The self-aligned nature of the process eliminates the need for multiple alignment steps and reduces dependence on expensive lithography equipment.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If conventional contact-hole masks are used for small contact hole openings, then contact holes can be formed, but light diffraction effect increases and photons reach the small contact holes less effectively

Engineering Contradiction:
Improvedefinition of small contact hole openingsVSAvoidlight photon efficiency in photolithography process
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The one-dimensional strip mask pattern reduces light diffraction effects compared to two-dimensional patterns with small features. The extended linear geometry of the strip pattern allows light to pass more effectively while still defining small contact hole openings with high precision.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11855218B2Transistor structure with metal interconnection directly connecting gate and drain/source regions
Publication Date: 2023.12.26 ETRON TECH INC
  • US11855218B2 patent drawing
  • US11855218B2 patent drawing
  • US11855218B2 patent drawing

AI summary

A transistor structure includes a semiconductor substrate, a gate structure, a channel region, and a first conductive region. The semiconductor substrate has a semiconductor surface. The gate structure is above the semiconductor surface, and a first concave is formed to reveal the gate structure. The channel region is under the semiconductor surface. The first conductive region is electrically coupled to the channel region, and a second concave is formed to reveal the first conductive region. A mask pattern in a photolithography process is used to define the first concave, and the mask pattern only defines one dimension length of the first concave.