MOSFET Source Doping Layout to Minimize Subthreshold Hump
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The subthreshold hump effect in MOSFETs, caused by shallow-trench isolation processes, leads to non-uniformities and higher leakage currents due to parasitic transistors with lower threshold voltages, resulting in undesirable noise behavior in analog circuits.
Innovation Solution
A semiconductor structure is designed with a substrate having an isolation structure, an active region, and a gate extended over both, featuring a source region with distinct subregions of different dopings and a silicide layer, which increases the resistance of parasitic transistors, reducing their contribution to the total drain current and minimizing the subthreshold hump effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If shallow-trench isolation processes are used to form isolation structures, then manufacturing efficiency is improved, but subthreshold hump effect occurs due to parasitic transistors with lower threshold voltages
Solution Approach 1:
The source region is divided into multiple subregions with different doping concentrations. The first subregion adjacent to the isolation structure has a first doping concentration, while the second subregion has a second doping concentration different from the first. This local differentiation in doping quality increases the resistance of parasitic transistors formed at the isolation structure interface, thereby reducing the subthreshold hump effect while maintaining overall manufacturing efficiency
Solution Approach 2:
The source region is segmented into multiple subregions with distinct doping characteristics. This segmentation allows independent optimization of different areas: the first subregion handles the interface with the isolation structure where parasitic transistors form, while the second subregion maintains the primary source function. This segmentation resolves the contradiction by locally addressing the parasitic transistor issue without compromising the overall device performance
2Quantity of substance
If parasitic transistors are present in the MOSFET, then total drain current is increased, but leakage current increases due to lower threshold voltage of parasitic transistors
Solution Approach 1:
Different subregions of the source are doped with different concentrations to create local quality variations. The subregion adjacent to the isolation structure has modified doping to increase parasitic transistor resistance, thereby reducing leakage current path while the rest of the source maintains optimal doping for current conduction
Solution Approach 2:
The parasitic transistors that cause harmful leakage effects are converted into beneficial elements by increasing their resistance through selective doping. The same structural features that create parasitic transistors are used, but with modified doping profiles that transform these parasitic elements from harmful leakage paths into high-resistance regions that suppress unwanted current flow
3Ease of manufacture
If source region has uniform doping, then manufacturing process is simplified, but subthreshold hump effect cannot be minimized
Solution Approach 1:
The source region employs local quality variation through multiple doping steps, where different areas receive different doping concentrations. This approach maintains relative process simplicity while effectively addressing the subthreshold hump effect through localized doping modification at the isolation structure interface
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased resistance of parasitic transistors reduces the subthreshold hump effect, leading to lower leakage currents and improved noise behavior in analog circuits by ensuring the core transistor can provide sufficient source current while minimizing the impact of parasitic transistors.
Implementation Method 1
The silicide layer may be formed over the second subregion, in contact with the second subregion, and separated from the first subregion
Data Source
AI summary
A semiconductor structure may include a substrate having a surface, an isolation structure formed on the surface, an active region formed on the surface adjacent to the isolation structure, a gate extended over the isolation structure and the active region, and a source region formed within the active region. The source region may include a first subregion formed adjacent to a first portion of the gate and the isolation structure, the first subregion having a first doping and a second subregion formed adjacent to a second portion of the gate, wherein the second subregion has a second doping different from the first doping.