High-Frequency MOSFET Switch Layout for Wire-Inductance Isolation

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Solution Overview

Problem

High frequency switches experience deterioration in isolation characteristics due to parasitic inductance from wire bonding, which affects signal transmission paths in high frequency regions.

Innovation Solution

A high frequency switch design incorporating m first MOS transistors connected in series between RF terminals and an RF common terminal, along with (m−1) second MOS transistors and a capacitor connected between ground, which reduces grounding impedance through LC resonance, thereby improving isolation characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If wire bonding is used for connection from semiconductor chip to package frame, then ease of manufacture is improved, but parasitic inductance increases causing isolation characteristics deterioration

Engineering Contradiction:
Improveease of manufactureVSAvoidisolation characteristics
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts the harmful parasitic inductance effect by introducing a capacitor that resonates with the wire bonding inductance at the frequency where isolation degradation occurs, effectively canceling out the harmful inductive effect and restoring isolation characteristics

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The capacitor acts as an intermediary element between the wire bonding and the ground connection, resonating with the parasitic inductance to cancel its harmful effects at specific frequencies, thereby maintaining isolation characteristics without removing the wire bonding structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If ground connection MOSFET switch circuits are connected through wire bonding, then device complexity is reduced, but isolation characteristics deteriorate in high frequency region

Engineering Contradiction:
Improvedevice complexityVSAvoidisolation characteristics
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent converts the harmful parasitic inductance of the wire bonding into a beneficial resonance effect by introducing a capacitor that resonates at the frequency where isolation degradation occurs, transforming the harmful inductive reactance into a capacitive reactance that cancels it out, thereby maintaining isolation characteristics without increasing device complexity

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively suppresses isolation degradation by canceling out wire inductance, enhancing isolation across a wide range of frequencies and improving signal switching reliability.

Implementation Method 1

a capacitor having one end connected to another end of a second MOS transistor and having the other end connected to ground

Methodology Applied
Scientific EffectLC resonance: Resonance

Data Source

PatentUS12113523B2High frequency switch and semiconductor device
Publication Date: 2024.10.08 KK TOSHIBA
  • US12113523B2 patent drawing
  • US12113523B2 patent drawing
  • US12113523B2 patent drawing

AI summary

According to an embodiment, an SPnT-type high frequency switch includes a plurality of first MOS transistors, second MOS transistors, and a capacitor. The plurality of first MOS transistors are connected in series between one of a plurality of RF terminals and an RF common terminal. The second MOS transistors have ends each connected to adjacent first MOS transistors among the first MOS transistors. The capacitor is connected between ground and another end of a second MOS transistor having one end connected to another end of a first MOS transistor having one end connected to the one of the RF terminals among the first and second MOS transistors.