MOSFET Array Threshold Voltage Variation Estimation

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Solution Overview

Problem

Existing technologies have not effectively addressed the significant variations in threshold voltage in transistor arrays, which are beyond stress-induced variations, and have not identified the underlying causes for these variations.

Innovation Solution

An automated method for estimating layout-induced variations in threshold voltage in integrated circuit layouts by selecting diffusion areas, identifying Si/STI edges and channel areas, calculating threshold voltage variations in longitudinal and transverse directions, and combining these to determine overall variations, which is achieved through the recombination of interstitial atoms and their effect on dopant concentration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If automated estimation method is applied, then measurement precision of threshold voltage variation is improved, but device complexity increases

Engineering Contradiction:

Improvethreshold voltage variation estimation accuracyVSAvoidanalysis system complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The method segments the threshold voltage variation analysis into distinct directional components (longitudinal and transverse) relative to the channel. By calculating variations in each direction separately and then combining them, the complex two-dimensional problem is broken down into manageable one-dimensional calculations, improving measurement precision without overwhelming system complexity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent replaces complex physical stress measurement systems with an automated computational estimation method that uses layout geometry and interstitial atom recombination models to predict threshold voltage variations, substituting mechanical/physical measurement infrastructure with software-based analysis

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If layout-induced variations are addressed, then manufacturing precision is improved, but ease of manufacture deteriorates

Engineering Contradiction:

Improvetransistor threshold voltage uniformityVSAvoidlayout design complexity

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The method performs preliminary estimation of threshold voltage variations during the layout design phase by analyzing interstitial atom recombination effects and directional variations. This allows designers to identify and correct potential threshold voltage non-uniformity issues before fabrication, improving manufacturing precision without requiring changes to the manufacturing process itself

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary computational model that bridges layout geometry and threshold voltage outcomes by modeling interstitial atom recombination effects. This intermediary layer translates layout features into predicted threshold voltage variations, enabling precision control through design rather than manufacturing process modification

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for the accurate estimation and reduction of threshold voltage variations in transistor arrays, specifically addressing the layout-induced swings of up to 22 mV, improving the precision and reliability of integrated circuit performance.

Implementation Method 1

which is achieved through the recombination of interstitial atoms and their effect on dopant concentration

Methodology Applied

Scientific EffectRecombination of interstitial atoms:

Implementation Method 2

semiconductor materials such as silicon and germanium exhibit the piezoelectric effect (mechanical stress-induced changes in electrical resistance)

Methodology Applied

Scientific EffectPiezoresistive effect: Piezoresistive Effect

Implementation Method 3

stress variations in a transistor array can produce variations in carrier mobility

Methodology Applied

Scientific EffectStress-induced mobility variation:

Data Source

PatentUS8347252B2Method for rapid estimation of layout-dependent threshold voltage variation in a MOSFET array

Publication Date: 2013.01.01 SYNOPSYS INC

AI summary

An automated method for estimating layout-induced variations in threshold voltage in an integrated circuit layout. The method begins with the steps of selecting a diffusion area within the layout for analysis. Then, the system identifies Si/STI edges on the selected area as well as channel areas and their associated gate/Si edges. Next, the threshold voltage variations in each identified channel area are identified, which requires further steps of calculating threshold voltage variations due to effects in a longitudinal direction; calculating threshold voltage variations due to effects in a transverse direction; and combining the longitudinal and transverse variations to provide an overall variation. Finally, a total variation is determined by combining variations from individual channel variations.