MOSFET Trench Insulation Layer for Planar Edge Termination
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Solution Overview
Problem
The formation of insulation layers in semiconductor devices, particularly in power MOSFETs, often results in a step between the insulation layer and the semiconductor body, making it difficult to use planarization processes in the formation of transistor cells due to the step caused by the insulation layer in the edge region.
Innovation Solution
A method involving forming a trench in the edge region of the semiconductor body, growing an insulation layer within the trench using a thermal oxidation process, and then planarizing the layer so that it remains only in the trench, thereby eliminating the step and allowing for planarization of the surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an insulation layer is deposited on the surface of the semiconductor body in the edge region, then the insulation function is improved, but a step is formed between the insulation layer and the semiconductor body surface in the inner region, making planarization difficult
Solution Approach 1:
The patent divides the semiconductor device into two distinct regions: an edge region where the insulation layer is formed to provide electrical isolation, and an inner region where transistor cells are formed without the insulation layer to maintain planarity. This spatial segmentation allows each region to be optimized for its specific function without compromising the other.
Solution Approach 2:
The insulation layer is applied selectively only to the edge region of the semiconductor body, not uniformly across the entire surface. This local application ensures that the insulation function is provided where needed (at the edges) while leaving the inner region planar for transistor cell formation, thus resolving the contradiction between insulation reliability and manufacturing ease.
2Reliability
If a thermal oxidation process is used to form the insulation layer, then the insulation quality is improved, but the step between the insulation layer and semiconductor body surface becomes more pronounced
Solution Approach 1:
The thermal oxidation process is applied selectively only to the edge region of the semiconductor body, creating an insulation layer that provides high-quality electrical isolation where needed while avoiding the formation of surface steps in the inner region that would interfere with transistor cell planarity.
Solution Approach 2:
The thermal oxidation process creates a high-quality insulation layer with excellent electrical properties in the edge region, while the inner region maintains its original planar surface morphology, thus achieving both insulation quality and surface planarity in different locations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of a trench insulation layer that fills the trench while maintaining an essentially planar surface, facilitating the formation of transistor cells and improving the edge termination structure of semiconductor devices.
Implementation Method 1
forming the insulation layer includes a thermal oxidation process
Data Source
AI summary
A method includes forming a trench in a first surface in an edge region of a semiconductor body, forming a plurality of superjunction transistor cells in an inner region of a semiconductor body, and forming an insulation layer on the first surface of the semiconductor body in the edge region and in the inner region, wherein forming the insulation layer includes a thermal oxidation process.