MOSFET VREF Generator Using Differential CTAT Voltages

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Solution Overview

Problem

Conventional reference voltage (VREF) generation circuits are difficult to calibrate for temperature independence, exhibit limited functionality due to non-linear V_CTAT and V_PTAT components, and consume significant chip area with bipolar junction transistors.

Innovation Solution

A VREF generation circuit with multiple stages using metal oxide semiconductor field effect transistors (MOSFETs) that generate complementary-to-absolute temperature voltages (V_CTAT1 and V_CTAT2) with the same temperature-dependent rate, outputting a constant VREF based on their difference, eliminating the need for bipolar junction transistors and reducing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional VREF generation circuits use bipolar junction transistors (BJTs) to generate V_CTAT and V_PTAT voltages, then the reference voltage can be generated, but the chip area consumption is significant

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and eliminates bipolar junction transistors (BJTs) from the VREF generation circuit, replacing them entirely with MOSFETs. This removal of the BJT component directly reduces chip area consumption while maintaining the core functionality of generating temperature-compensated reference voltage through alternative circuit topology using only MOSFET devices

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the fundamental device parameter by transitioning from BJT-based voltage generation to MOSFET-based voltage generation. This parameter change enables the same V_CTAT and V_PTAT voltage generation functionality to be achieved with different physical mechanisms, resulting in reduced area consumption while maintaining reference voltage stability across temperature variations

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional circuits use V_CTAT and V_PTAT addition to generate VREF, then the reference voltage can be generated, but the circuit is difficult to calibrate and has limited functionality due to non-linearity

Engineering Contradiction:
Improvereference voltage constancyVSAvoidcalibration difficulty
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of adding V_CTAT and V_PTAT voltages as in conventional circuits, the patent inverts the approach by generating VREF through the difference between two V_CTAT voltages (V_CTAT1 and V_CTAT2) that have different temperature coefficients. This inversion of the mathematical operation (from addition to difference) simplifies the calibration process and improves functionality by eliminating the need to precisely match non-linear V_PTAT characteristics

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent introduces dynamic adjustment capability by generating two separate V_CTAT voltages with different temperature dependencies that can be combined to achieve temperature-independent VREF. This dynamic approach allows the circuit to adapt to temperature changes without requiring complex calibration, as the temperature coefficients can be adjusted through device sizing and circuit configuration rather than precise component matching

Inventive Principle:
Principle #15Dynamics

3Reliability

If V_CTAT or V_PTAT is the dominant non-linear voltage component at high temperatures, then VREF generation is possible, but VREF varies significantly when temperature rises above 130°C

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidtemperature range stability
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent applies the counterweight principle by generating two V_CTAT voltages (V_CTAT1 and V_CTAT2) with opposite temperature coefficient signs or different temperature dependencies. When these voltages are combined through the MOSFET network, their temperature-dependent variations counterbalance each other, canceling out the non-linear effects that would otherwise cause significant VREF variation at high temperatures above 130°C

Inventive Principle:
Principle #8Anti-weight (Counterweight)

Solution Approach 2:

The patent creates a composite voltage generation system by combining multiple MOSFET-based voltage generation paths with different temperature characteristics. This composite approach, analogous to using composite materials, allows the circuit to achieve superior temperature stability by leveraging the complementary temperature dependencies of different MOSFET configurations to cancel out non-linear effects across an extended temperature range

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20250390128A1Reference voltage generator using a pair of complementary-to-absolute temperature voltages
Publication Date: 2025.12.25 GLOBALFOUNDRIES US INC
  • US20250390128A1 patent drawing
  • US20250390128A1 patent drawing
  • US20250390128A1 patent drawing

AI summary

Disclosed are a structure and method for generating a reference voltage (VREF) that remains essentially constant in response variations in temperature and/or variations in a positive supply voltage. The structure can include a VREF generation circuit with a first stage for generating a first complementary-to-absolute temperature voltage (V_CTAT1), a second stage for generating a second complementary-to-absolute temperature voltage (V_CTAT2) higher than but exhibiting the same temperature-dependent rate of change as V_CTAT1, and an output stage for generating VREF as a function of the difference between V_CTAT2 and V_CTAT1 (e.g., VREF can be approximately equal to V_CTAT2 minus V_CTAT1). In this structure, the same bias voltage (VBIAS) is employed for each stage and all transistors can be metal oxide semiconductor field effect transistors (MOSFETs). With the disclosed configuration, a more stable VREF across a wider temperature range and/or VDD range is achievable and the structure may consume less chip area.