Work Function Layer Segmentation for MOSFET Gate Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The reduction in channel length of MOSFET devices leads to difficulties in gate control, resulting in sub-threshold leakage and electrical performance degradation, which is exacerbated by the transition from planar to 3D transistor devices, necessitating improved control over the channel region.
Innovation Solution
A method involving a base substrate with distinct regions and a transition region, where a first work function layer is formed and then partially removed using a hard mask layer, followed by the formation of a second work function layer, to enhance control and electrical performance by separating and protecting the regions during etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the channel length is reduced to increase chip density and switching speed, then the integration level and performance are improved, but the gate control ability degrades and sub-threshold leakage increases
Solution Approach 1:
The patent transitions from planar MOSFET to Fin-FET structure, utilizing vertical fins to extend the gate control into the third dimension. This allows the gate to control the channel from multiple directions (top and sidewalls), effectively improving gate control ability while maintaining scaled-down channel dimensions for high density.
Solution Approach 2:
The channel region is segmented into multiple fins rather than a single planar channel. This segmentation increases the effective gate control surface area and allows better electrostatic control over the channel, reducing sub-threshold leakage while maintaining compact footprint for high integration.
2Ease of manufacture
If a single work function layer is formed across the entire substrate, then the process is simple, but the electrical performance and threshold voltage control are insufficient
Solution Approach 1:
The patent implements different work function layers in different regions: a first work function layer in the second device region and a second work function layer in the first device region and transition region. This local differentiation allows optimization of threshold voltages for different device types (e.g., NFET and PFET) independently, improving electrical performance and device matching.
Solution Approach 2:
The work function layer is segmented into two separate layers formed at different stages. The first work function layer is formed initially, then partially removed in the transition region, and the second work function layer is formed to complete the differentiation. This segmented approach enables precise control of threshold voltages across different device regions.
3Manufacturing precision
If the first work function layer is removed completely in the transition region, then region separation is achieved, but surface defects and quality degradation occur
Solution Approach 1:
The patent selectively removes only the first work function layer in the transition region while preserving it in the second device region. This extraction achieves proper region separation for different device types without completely eliminating the work function layer from the entire substrate, maintaining quality where needed.
Solution Approach 2:
The removal of the first work function layer is applied locally only to the transition region, not uniformly across the entire substrate. This localized treatment achieves the necessary region separation while preserving the work function layer in areas where it is needed for device operation, thereby maintaining overall layer quality.
Data Source
AI summary
Semiconductor device is provided. The semiconductor device includes a base substrate including a first device region, a second device region, and a transition region separating the first region from the second region. A first work function layer is formed on the base substrate in the second region. A second work function layer is formed on the base substrate in the first region and the transition region, and on the first work function layer in the second region.