Motion Compensation Memory Fetching for Video Coding Bandwidth
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Solution Overview
Problem
Existing video processing systems experience significant memory bandwidth waste due to non-aligned memory reads, overlapping reference blocks, and sub-pixel accurate motion compensation requirements, particularly in emerging video coding standards like H.264, which demand smaller and variable block sizes, leading to inefficient memory access during motion compensation.
Innovation Solution
A system with a motion vector evaluation unit and a motion compensation memory fetching unit that analyzes motion vectors of neighboring blocks to collectively fetch reference blocks with similar or same motion vectors, reducing memory bandwidth waste by optimizing memory access and minimizing unnecessary data fetches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If variable block-size motion compensation with small block sizes is implemented, then motion vector flexibility and video compression performance are improved, but memory bandwidth waste increases due to non-aligned memory reads
Solution Approach 1:
The patent merges multiple reference block fetch operations into a single memory read operation by identifying and combining reference blocks that share the same memory read unit. This is achieved through the reference block merging unit that determines whether multiple reference blocks can be fetched together, thereby reducing the number of separate memory access operations and minimizing bandwidth waste.
Solution Approach 2:
The patent performs preliminary evaluation of motion vectors for multiple current blocks before executing memory fetch operations. The motion vector evaluation unit assesses motion vector similarity in advance, and the reference block configuration evaluation unit determines the optimal fetch configuration beforehand, allowing the system to plan memory access patterns that minimize bandwidth consumption before actual data transfer occurs.
2Productivity
If multiple independent motion vectors are used for each block, then spatial redundancy reduction is improved, but the number of memory fetches increases
Solution Approach 1:
The patent combines multiple memory fetch operations into single fetch operations by identifying reference blocks that can be shared across multiple current blocks. The reference block merging unit specifically determines when multiple reference blocks can be fetched together in a single memory access, thereby reducing the total number of fetch operations while maintaining support for multiple independent motion vectors.
Solution Approach 2:
The patent identifies and eliminates redundant memory fetch operations by detecting when reference blocks are duplicated across multiple fetch operations. The system recovers from this inefficiency by merging fetch operations, thereby discarding redundant memory access attempts while preserving the necessary data for multiple motion compensation operations.
3Adaptability or versatility
If non-aligned memory reads are performed to accommodate variable block sizes, then block size adaptability is improved, but memory bandwidth efficiency deteriorates
Solution Approach 1:
The patent merges multiple non-aligned reference block fetch operations into single aligned memory read operations. The reference block merging unit determines when reference blocks from different current blocks can be combined into a single memory read operation, thereby aligning memory access patterns with memory unit boundaries and improving bandwidth efficiency while maintaining support for variable block sizes.
Solution Approach 2:
The patent performs preliminary evaluation of reference block positions and memory alignment requirements before executing fetch operations. The reference block configuration evaluation unit assesses the alignment characteristics of multiple reference blocks in advance and determines the optimal merging configuration, allowing the system to plan memory access patterns that maximize alignment efficiency before actual data transfer occurs.
Data Source
AI summary
A system (and a method) are disclosed for intelligently fetch one or multiple reference blocks from memory for each block to be motion compensated or motion estimated within a video processing system. The system includes a reference block configuration evaluation unit and a motion compensation memory fetching unit. The reference block configuration evaluation unit analyzes the reference block configuration of the block being motion compensated with a plurality of reference block configurations of its neighboring blocks. In response to a reference block configuration evaluation result, the reference block configuration evaluation unit decides the configuration of reference blocks to be fetched from a memory. The motion vector memory fetching unit fetches the number of reference blocks for motion compensation accordingly.