Motion Estimation Engine for HEVC Video Encoding
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Solution Overview
Problem
High Efficiency Video Coding (HEVC) requires significant hardware resources for motion estimation due to multi-loop structures and increased memory bandwidth, limiting the depth of the calculation pipeline and scalability, which restricts the balance between parallel and sequential calculation.
Innovation Solution
A motion estimation engine implemented in FPGA or ASIC configurations, utilizing single-iterated calculation for Motion Vectors (MV) across all Prediction Units (PU) and Coding Units (CU), with parallel processes for rough and final estimation, and employing transformed images with reduced bit-depth for efficient candidate selection and interpolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multi-loop structures are used for recursive re-calculation of pixels, then encoding quality is improved, but memory bandwidth requirements increase and pipeline depth is restricted
Solution Approach 1:
The patent applies preliminary action by performing motion estimation on the smallest CUs first to obtain MV candidates before processing larger CUs. This pre-calculation of base MVs enables subsequent CUs to reuse these candidates, reducing the need for repeated full motion estimation and thereby reducing memory bandwidth requirements while maintaining encoding quality.
Solution Approach 2:
The patent segments the motion estimation process into hierarchical levels based on CU sizes. Motion estimation is performed on smallest CUs (base CUs) to generate MV candidates, which are then reused by larger CUs. This segmentation avoids redundant calculations across different CU sizes and reduces memory bandwidth consumption.
2Productivity
If parallel calculation is used to replace recursive calculation cycles, then processing speed is improved, but extra hardware resources are required
Solution Approach 1:
The patent implements a dynamic hybrid architecture that adapts between parallel and sequential processing based on CU size and position. Smallest CUs are processed in parallel to generate MV candidates, while larger CUs reuse these candidates through sequential processing. This dynamic approach optimizes processing speed without requiring full parallel hardware for all operations, thus avoiding excessive hardware complexity.
Solution Approach 2:
The patent creates a universal motion estimation engine that can handle multiple CU sizes using the same hardware resources. The engine processes base CUs in parallel and then reuses the generated MV candidates for larger CUs, making the hardware multi-functional. This eliminates the need for separate parallel processing units for each CU size, reducing overall hardware complexity while maintaining high processing speed.
3Measurement precision
If motion estimation is performed for all CU sizes with full recursion, then encoding accuracy is improved, but hardware scalability is restricted
Solution Approach 1:
The patent performs preliminary motion estimation on the smallest CUs to establish base MV candidates before processing larger CUs. This preliminary action ensures encoding accuracy is maintained for all CU sizes while allowing the hardware architecture to scale efficiently, as the same base estimation engine can serve multiple CU sizes without full recursion for each.
Solution Approach 2:
The patent changes the parameter of motion estimation granularity by performing estimation only on the smallest CUs (base CUs) and then reusing these results for larger CUs. This parameter change from full recursion at all levels to selective base-level estimation improves hardware scalability while maintaining encoding accuracy through intelligent reuse of MV candidates across different CU sizes.
Data Source
AI summary
The motion estimation engine has a multi-threaded structure and comprises a preprocessor for rough motion estimation of motion vectors and in-loop motion estimator for creating a coding tree unit, as well as a shared memory for interaction of the pre-processor with the in-loop motion estimator. The coding tree unit is formed by merging neighboring partitions of coding units using a list of best MV candidates.