Motor Control Apparatus A/D Converter Timing Overlap
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Solution Overview
Problem
Existing motor control apparatuses face challenges in accurately detecting faults in R/D converters when the timing for A/D conversions of motor current and resolver output signals overlap, leading to potential errors in motor control and fault detection.
Innovation Solution
A motor control apparatus that uses a common A/D converter for both motor current and resolver output signals, with a processor that calculates the optimal timing for A/D conversions based on the feedback cycle and peak timing of the reference signal, ensuring separate and non-overlapping conversion timings to prevent erroneous fault detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a common A/D converter is used for both motor current conversion and resolver output signal conversion, then the circuit size is reduced, but the timing overlap between conversions causes erroneous fault detection
Solution Approach 1:
The patent applies dynamics by making the A/D converter's operational state changeable based on timing conditions. The converter dynamically switches between two operational modes: (1) converting resolver output signals at reference signal peak timing for fault detection, and (2) converting motor current at feedback cycle timing for motor control. This dynamic state change resolves the contradiction by allowing the single converter to serve both functions at different times, reducing circuit size while preventing timing overlap that would cause erroneous fault detection.
2Productivity
If A/D conversion timing for resolver output signals overlaps with feedback cycle timing for motor current, then the common A/D converter can be efficiently utilized, but the motor control process cannot be executed appropriately and erroneous fault determination occurs
Solution Approach 1:
The patent applies periodic action by establishing a periodic timing determination mechanism that regularly checks whether the current reference signal peak timing overlaps with the feedback cycle timing. Based on this periodic check, the system selectively permits or inhibits A/D conversion of resolver output signals. This ensures that the common A/D converter is efficiently utilized whenever timing allows, while preventing overlap that would compromise motor control execution accuracy or cause erroneous fault determination.
Data Source
AI summary
A motor control apparatus includes an A/D converter to apply A/D conversions to a motor current signal and a resolver output signal, respectively; a processor configured to: detect a fault of an R/D converter, by comparing a motor rotation angle calculated by the R/D converter from the resolver output signal, and a motor rotation angle calculated based on the current signal; permit the A/D converter to apply the A/D conversion to the resolver output signal at a peak timing of a reference signal when a first time obtained by subtracting a process time required for a control process of the motor from a feedback cycle, is longer than a second time having passed since a control end timing when the control process has ended until the peak timing, or inhibit the A/D converter from applying the A/D conversion when the first time is not longer than the second time.