Digital Motor Controller Stability Analysis via FPGA Signal Injection

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Solution Overview

Problem

Existing tools lack the ability to effectively determine the stability of digital motor controllers, making it difficult to assess the efficiency of these systems, which is crucial for efficient motor operation.

Innovation Solution

A computer-implemented method and system using a FPGA-based digital motor controller that injects a digital sinusoidal noise signal into the speed control loop, allowing for the analysis of gain and phase margins by exporting time domain characteristics of the injected and feedback signals, enabling the generation of Bode plots for stability verification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If digital motor controllers are used, then motor control precision and efficiency are improved, but stability measurement capability deteriorates

Engineering Contradiction:
Improvestability measurementVSAvoidcontroller complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a stability analysis tool as an intermediary device that interfaces with the digital motor controller. This tool includes a signal generator that injects test signals and a frequency response analyzer that processes the controller's response, enabling stability measurement without modifying the complex digital controller itself. The intermediary translates the complex digital controller's behavior into measurable stability parameters.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If traditional analog measurement methods are used, then stability analysis is simple, but applicability to digital systems deteriorates

Engineering Contradiction:
Improvemeasurement applicabilityVSAvoidstability analysis accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent transforms the measurement approach by changing from direct analog error voltage measurement to frequency domain analysis. The stability analysis tool injects sinusoidal test signals at varying frequencies and measures the controller's frequency response, converting temporal domain measurements into frequency domain characteristics. This parameter transformation enables the measurement method to adapt to digital controllers while maintaining measurement precision through Bode plot analysis.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If digital control loops are implemented, then control accuracy is improved, but difficulty of detecting and measuring stability deteriorates

Engineering Contradiction:
Improvecontrol accuracyVSAvoidstability detection difficulty
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The patent employs periodic sinusoidal test signals injected at multiple frequencies to probe the digital control loop's stability characteristics. By using periodic excitation signals and analyzing the periodic response, the tool can detect stability margins that are not observable through normal operation. The periodic action reveals the system's frequency response characteristics, making stability detection feasible for high-accuracy digital controllers.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentEP3193223B1Digital motor controller stability analysis tool
Publication Date: 2021.10.06 HAMILTON SUNDSTRAND SPACE SYST INT INC
  • EP3193223B1 patent drawingFigure 1
  • EP3193223B1 patent drawingFigure 2

AI summary

A technique for performing stability analysis for a digital motor controller (102) is provided where the technique includes receiving a reference signal to be injected into a digital speed control loop (118) and controlling, by a hardware description language (VHDL) component (112), the injection of the reference signal into the digital control loop through a field programmable gate array (FPGA) hardware interface (106). The technique also includes providing the reference signal to the digital speed control loop to determine a performance of the digital motor controller and receiving a feedback signal, at the FPGA hardware interface, from the digital speed control loop based on the reference signal. The technique includes comparing the reference signal to the feedback signal to evaluate the performance of the digital motor controller and exporting a result of the comparing by the FPGA hardware interface to indicate the performance of the digital motor controller.