Motor Drive Safety Monitoring for Hardware Failure Switching
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Solution Overview
Problem
Existing motor drive control systems face challenges in maintaining a safe operational status during hardware failures, such as master control chip failures, which can pose risks to users.
Innovation Solution
A safety status monitoring system and method that includes a master control chip with a hardware safety management unit, a power management chip, a bus voltage comparison module, a three-phase bridge switching circuit module, and a safety control logic generation module, which work together to generate signals for enabling and controlling the operation of power transistors and monitoring the safety status of the system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hardware failure monitoring is implemented in the motor drive control system, then the safety status is improved, but the device complexity increases
Solution Approach 1:
The monitoring system is divided into independent functional modules: master control chip with hardware safety management unit, power management chip, bus voltage comparison module, safety control logic generation module, gate drive module, and drive safety status monitoring module. Each module performs a specific monitoring function, allowing the complex safety system to be structured as manageable segments that can be independently designed and tested.
Solution Approach 2:
The system performs preliminary safety checks by continuously monitoring hardware status, bus voltage, and power supply conditions before failures can affect system operation. The hardware safety management unit proactively detects potential failures and triggers safety status transitions in advance, preventing harmful effects rather than responding after failures occur.
2Measurement precision
If multiple monitoring modules and signals are added to detect hardware failures, then the measurement precision of safety status is improved, but the device complexity increases
Solution Approach 1:
The master control chip integrates multiple functions including motor control, hardware failure detection, and safety status management within a single device. The hardware safety management unit performs multiple monitoring tasks such as detecting power supply failures, bus voltage anomalies, and internal hardware faults using the same chip resources, reducing the need for separate dedicated monitoring hardware.
Solution Approach 2:
The safety control logic generation module acts as an intermediary that receives various failure signals from different sources (master control chip, power management chip, bus voltage comparison module) and processes them into unified safety status control signals. This intermediary layer simplifies the complexity by centralizing the interpretation and response logic for multiple monitoring inputs.
3Reliability
If real-time safety monitoring and response mechanisms are implemented, then the reliability during hardware failure is improved, but the loss of time for safety status switching increases
Solution Approach 1:
The system continuously monitors hardware status and maintains readiness to transition to safety status by pre-configuring the monitoring circuits and control logic. When a failure condition is detected, the pre-established signal paths and control modules can immediately execute the safety status transition without requiring complex real-time computation or decision-making during the critical response period.
Solution Approach 2:
The drive safety status monitoring module provides continuous feedback about the actual safety status to the safety control logic generation module. This feedback mechanism ensures that the system can verify whether a safety status transition has been successfully achieved and can trigger corrective actions if the transition fails, thereby improving reliability while maintaining rapid response through closed-loop monitoring.
Data Source
AI summary
A safety status monitoring system and method includes a master control chip to issue a master control chip hardware failure signal; a power management chip; a bus voltage comparator; a three-phase bridge switching circuit; a safety control logic generator to generate a hardware failure mode enable signal and a hardware failure status control signal based on the master control chip hardware failure signal, safety status entry and safety status switching signals; a gate driver to generate gate drive signals based on the hardware failure mode enable signal and the hardware failure status control signal to perform on/off operations on power transistors in the three-phase bridge switching circuit; and a drive safety status monitor to generate a drive safety status feedback control signal based on the hardware failure mode enable signal, the hardware failure status control signal, a gate driver failure status signal, and a power transistor working status signal.