Moulding Cap Via Hole Formation in Semiconductor Stacking
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Solution Overview
Problem
Current semiconductor package stacking technologies face challenges in achieving high yield and reliability, particularly in the integration of multiple chips, which can lead to defects and reduced performance.
Innovation Solution
A method of forming semiconductor packages involves creating a moulding cap with via holes and a recess structure using a mould, allowing for the secure stacking of packages by injecting an epoxy moulding compound between moulds and curing it, thereby forming a reliable interconnect between chips without damaging the substrate or pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If laser is used to form via holes in moulding cap, then via holes can be formed, but substrate and pads may be damaged
Solution Approach 1:
The patent introduces a mould as an intermediary tool to form via holes in the moulding cap. The mould physically defines the via hole positions and shapes during the moulding process, eliminating the need for laser drilling that could damage the substrate and pads. The mould acts as a mediator that achieves via hole formation without direct energy interaction with the sensitive components.
Solution Approach 2:
The via holes are formed in the moulding cap during the initial moulding process rather than afterward. The mould includes provisions for forming via holes as the moulding compound is injected and cured, so the via holes are created before subsequent assembly steps. This preliminary formation prevents later interventions that might require damaging operations.
2Quantity of substance
If multiple semiconductor chips are stacked to achieve high density, then integration density increases, but yield and reliability decrease
Solution Approach 1:
The patent segments the multi-chip stacking system into modular packages, each containing a chip with its own moulding cap. The moulding cap is divided into distinct regions: a recess structure that precisely receives and secures the first chip, and a via hole structure that enables controlled electrical interconnection. This segmentation allows each module to be independently formed and tested, improving overall reliability while maintaining high density.
Solution Approach 2:
The moulding cap serves as an intermediary component between stacked packages. It provides the recess structure that mechanically secures the chip and the via holes that enable electrical connection, acting as a mediator that facilitates reliable inter-package communication without direct chip-to-chip contact. This intermediary structure reduces stress and misalignment issues in multi-chip stacks.
3Adaptability or versatility
If via holes are formed after moulding cap is created, then via holes can be added, but process complexity and defect risk increase
Solution Approach 1:
The patent merges the via hole formation process with the moulding cap creation process. The mould is designed to form both the moulding cap and the via holes in a single operation during compound injection and curing. This combining of operations eliminates subsequent via hole formation steps, reducing process complexity and the risk of defects from multiple processing stages.
Solution Approach 2:
The mould serves multiple functions: it forms the moulding cap structure, creates the via holes, and defines the recess structure for chip reception. This multi-functional mould eliminates the need for separate tools or processes for each feature, simplifying the overall manufacturing process while maintaining adaptability for different package designs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and density of chip stacking by preventing defects associated with laser-formed via holes, simplifies the process, and reduces the weight and height of the package while ensuring stable electrical connections.
Implementation Method 1
injecting an epoxy moulding compound (EMC) into a formation region between the upper mould and the lower mould and then curing the EMC
Implementation Method 2
adhering the moulding cap to an upper surface of the first package by an adhesive
Implementation Method 3
providing a solder ball on at least one of the first and second pads and providing the solder ball into the via hole
Data Source
AI summary
Provided is a method of forming a semiconductor package. In the method, a first package including a first chip on a first substrate is formed, a second package including a second chip on a second substrate is formed, a molding cap provided with a via hole and a recess structure configured to receive the first chip is formed, and the second package is provided on the first package with the molding cap being therebetween such that the recess receives the first chip. The via hole and the recess structure are simultaneously formed.