Semiconductor Package Mount Assembly for Large-Panel Warpage

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Solution Overview

Problem

Larger panel formats in semiconductor packaging are prone to warpage during assembly, which can lead to process issues and inefficiencies in thermal dissipation and power delivery.

Innovation Solution

The implementation of a semiconductor package substrate with longitudinally arranged channels in the inner core layer, combined with a mount assembly that inserts into these channels to stabilize the panel and minimize warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If larger panel formats are used to increase area for utilization and process efficiency, then productivity and area utilization are improved, but warpage during assembly increases

Engineering Contradiction:
Improveprocess efficiencyVSAvoidwarpage
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The panel is segmented into multiple regions with individually adjustable mounts. The mount assembly is divided into multiple independent adjustment mechanisms that can be positioned at different locations across the panel, allowing localized correction of warpage in different regions while maintaining overall panel stability during assembly.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The mount assembly incorporates adjustable and movable components that can be dynamically repositioned during assembly. The mounts can be adjusted to different heights and positions to compensate for warpage variations, and the entire mount assembly can be moved to different locations on the panel to address different warpage regions as needed.

Inventive Principle:
Principle #15Dynamics

2Area of stationary object

If larger panel formats are used to increase area for utilization, then area utilization is improved, but manufacturing precision deteriorates

Engineering Contradiction:
Improvearea for utilizationVSAvoidflatness
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The large panel is divided into multiple smaller effective working regions by the mount assembly. Each mount creates a localized stable platform, effectively segmenting the large panel into multiple precision zones, allowing manufacturing operations to be performed with high precision on each segment while the overall panel area remains large.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The mount assembly provides localized quality improvement by creating stable, flat mounting regions at specific locations on the panel. Rather than requiring the entire large panel to maintain uniform flatness, the mounts create locally precise areas where manufacturing operations occur, allowing the rest of the panel area to be larger without compromising overall manufacturing precision.

Inventive Principle:
Principle #3Local quality

3Power

If through-plane paths are increased to provide power supply and heat extraction in larger panels, then power delivery and thermal dissipation are improved, but temperature and energy losses increase

Engineering Contradiction:
Improvepower deliveryVSAvoidenergy losses
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent transitions from relying solely on through-plane paths (vertical dimension) for power delivery and heat extraction to incorporating in-plane paths (horizontal dimension) through the mount assembly. The mounts can conduct power and heat laterally across the panel surface, creating a two-dimensional network for power and thermal distribution that reduces the burden on through-plane paths and decreases energy losses.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The mount assembly acts as an intermediary structure that facilitates both mechanical stabilization and electrical/thermal conduction. The mounts serve as intermediate conduits for power delivery and heat extraction, providing alternative pathways that reduce the length and resistance of through-plane paths, thereby reducing energy losses while maintaining effective power delivery and thermal dissipation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250201605A1Assembly and method for preventing warpage in a semiconductor package
Publication Date: 2025.06.19 INTEL CORP
  • US20250201605A1 patent drawing
  • US20250201605A1 patent drawing
  • US20250201605A1 patent drawing

AI summary

The present disclosure relates to an assembly for preventing warpage in a semiconductor package. The assembly may include a semiconductor package substrate including one or more channels arranged longitudinally in an inner core layer of the semiconductor package substrate. The assembly may further include a mount assembly including one or more mounts operable to be insertable into corresponding channels of the semiconductor package substrate.