Mounting Substrate Cu Bumps With Uniform End-Face Height
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Solution Overview
Problem
Conventional semi-additive process (SAP) for forming Cu pillar bumps results in significant variation in the height positions of the end faces of the bumps, leading to potential electrical connection failures between semiconductor chips and substrates.
Innovation Solution
A mounting substrate manufacturing method that involves forming conductive bumps with controlled height variations by using a production plate with regulated openings and subsequent electroless plating to create a protective layer, ensuring uniformity in end face heights.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If Cu pillar bumps are formed by electroplating in the conventional SAP, then the manufacturing process is simple and efficient, but the height positions of the end faces of the Cu pillar bumps vary greatly
Solution Approach 1:
The patent applies preliminary action by forming a protective layer over the insulating layer before electroplating the Cu pillar bumps. This protective layer serves as a depth reference that ensures all bumps grow to a uniform height, with their end faces becoming substantially coplanar. The protective layer is removed after plating, leaving uniformly heighted bumps without requiring complex real-time control during the plating process itself.
2Productivity
If the height positions of Cu pillar bumps vary greatly, then the manufacturing process is faster, but the electrical connection reliability deteriorates
Solution Approach 1:
The protective layer is formed in advance as a depth reference before electroplating. This preliminary structure ensures that all Cu pillar bumps grow to substantially the same height, with their end faces becoming coplanar. This uniformity guarantees reliable electrical connection when semiconductor chips are mounted, while the process remains efficient as it avoids complex real-time monitoring and adjustment during plating.
3Manufacturing precision
If a protective layer is formed over the insulating layer before electroplating, then the height uniformity of conductive bumps is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The protective layer acts as an intermediary element that simplifies the overall process. By providing a uniform depth reference during electroplating, it enables automatic height control without requiring complex monitoring systems or multiple plating steps. The layer is temporarily present during manufacturing and is removed after serving its purpose, adding minimal permanent complexity to the final structure.
4Ease of manufacture
If the end faces of conductive bumps are not coplanar, then the electroplating process is simpler, but the contact reliability with electrode pads decreases
Solution Approach 1:
The protective layer is formed before electroplating to establish a uniform depth reference. During electroplating, this reference ensures all bumps grow to the same height, making their end faces substantially coplanar. This preliminary preparation maintains electroplating simplicity while guaranteeing reliable contact with electrode pads, as all bump ends are at the same level for consistent electrical connection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the reliability of electrical connections by ensuring all conductive bumps can contact electrode pads, thereby improving the stability of semiconductor chip mounting.
Implementation Method 1
a seed layer made of copper is formed on an insulating layer by electroless plating
Implementation Method 2
the plurality of Cu pillar bumps made of copper are formed on the seed layer in the respective plurality of openings of the resist by electroplating
Data Source
AI summary
A mounting substrate includes: an insulating layer; and a plurality of conductive bumps arranged on or above the insulating layer. A variation in height position between a plurality of end faces of the plurality of conductive bumps on a side opposite to the insulating layer is smaller than a variation in height position between a plurality of end faces of the plurality of conductive bumps on a side where the insulating layer is located.