Parallel MPEG-4 Decoding With Split Error Recovery Processors
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Solution Overview
Problem
Existing video decoders, such as the Equator MAP-CA DSP MPEG-4 video decoder, are inefficient in decoding video data due to the inability of the high-level processor to handle errors effectively, leading to monopolization of computational resources and interruption of high-level processing.
Innovation Solution
A data processing system utilizing two processors that operate in parallel, where a general-purpose processor handles high-level decoding and an application-specific processor performs low-level decoding, including error recovery routines, to efficiently decompress video data without monopolizing the high-level processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single high-level processor handles both high-level decoding and error recovery, then the processor can perform all decoding functions, but the processor becomes monopolized and decoding efficiency decreases
Solution Approach 1:
The patent divides the decoding workload into two distinct segments: high-level decoding tasks are handled by the main processor, while error recovery tasks are delegated to an auxiliary processor. This segmentation prevents the main processor from being monopolized by error recovery operations, thereby improving overall decoding efficiency while maintaining manageable system complexity.
2Reliability
If the high-level processor handles error recovery, then error recovery can be performed, but high-level processing is interrupted
Solution Approach 1:
The patent extracts the error recovery function from the main processor and assigns it to a dedicated auxiliary processor. This allows the main processor to continue high-level decoding operations without interruption, while the auxiliary processor independently handles error recovery tasks, thus improving both reliability and reducing time loss.
3Speed
If computational resources are concentrated in one processor, then resource management is simple, but decoding speed decreases
Solution Approach 1:
The patent segments computational resources across two processors: the main processor handles high-level decoding operations while the auxiliary processor handles error recovery. This segmentation increases decoding speed by parallelizing tasks, and the coordination complexity is managed through well-defined task allocation and communication protocols between the processors.
Data Source
AI summary
An apparatus and method of decoding coded video bitstreams is disclosed. The apparatus comprises a first processor and a second processor configured to operate in parallel. The main processor receives the coded video bitstream, parses it, and calls the second processor to decode the coded video bitstream to retrieve macroblock data. If an error occurs during decoding, the second processor signals the first processor, which can instruct the second processor to perform an error recovery routine. The first processor the performs dequantization and inverse DCT to recover digital pixel data from the macroblocks so that an image formed from the digital pixel data can be later displayed on a monitor.