Current Conveyor Circuit for MPL Noise Tolerance

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Solution Overview

Problem

Existing mobile pixel link (MPL) receivers face issues with low common mode voltage, leading to noise tolerance limitations and functional distortions due to increased voltage at the 'acgnd' node, causing transistors to enter the triode state, loss of gain, or increased current consumption.

Innovation Solution

A current conveyor circuit with a PMOS transistor and an NMOS transistor, where the NMOS transistor's gate-to-source voltage is kept below the PMOS transistor's threshold voltage, using a low voltage input current mirror to maintain saturation and increase the common mode voltage range without affecting functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the voltage at the 'acgnd' node is increased to raise the input common mode voltage, then noise tolerance is improved, but the drain to source voltage of the first transistor decreases causing it to enter the triode state and distort the response

Engineering Contradiction:
Improvenoise toleranceVSAvoidtransistor operation state
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

A second NMOS transistor is introduced as an intermediary between the 'acgnd' node and ground. This intermediary transistor allows the 'acgnd' node voltage to be raised for improved noise tolerance while maintaining adequate drain-to-source voltage across the first transistor through the voltage drop across the second transistor, preventing triode state entry and response distortion

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the voltage distribution parameters in the circuit by introducing a new voltage node between the first transistor source and ground. This parameter change allows the 'acgnd' node to operate at a higher voltage for noise immunity while the first transistor maintains its proper operating parameters through the intermediate voltage level

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If the voltage at the 'acgnd' node is increased to raise the input common mode voltage, then noise tolerance is improved, but the voltage at the 'ning' node increases causing loss of gain

Engineering Contradiction:
Improvenoise toleranceVSAvoidcurrent conveyor gain
Core Design Contradiction:
Object-affected harmful factorsVSPower

Solution Approach 1:

The second NMOS transistor serves as a voltage buffer that decouples the voltage changes at the 'acgnd' node from the 'ning' node. This intermediary structure allows the 'acgnd' node voltage to increase for noise tolerance while the 'ning' node voltage remains relatively stable, preserving the current conveyor gain

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-affected harmful factors

If the voltage at the 'acgnd' node is increased to raise the input common mode voltage, then noise tolerance is improved, but current consumption increases

Engineering Contradiction:
Improvenoise toleranceVSAvoidcurrent consumption
Core Design Contradiction:
Object-affected harmful factorsVSUse of energy by moving object

Solution Approach 1:

The invention changes the voltage parameter distribution by introducing an intermediate voltage node, allowing the 'acgnd' node to operate at a higher voltage for noise tolerance while the second transistor is designed to minimize current consumption through proper sizing and biasing, achieving noise immunity without significant power penalty

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7764115B1System and method for providing a high input common mode current conveyor
Publication Date: 2010.07.27 NAT SEMICON CORP
  • US7764115B1 patent drawing
  • US7764115B1 patent drawing
  • US7764115B1 patent drawing

AI summary

A system and method is disclosed for providing an improved current conveyor circuit in a mobile pixel link (MPL) receiver that can provide an increased input common mode voltage to allow a greater tolerance of noise on a transmission line. The current conveyor circuit comprises (1) a PMOS transistor with a source coupled to an operating voltage Vdd and a drain that is coupled to a current source, and (2) an NMOS transistor with a source coupled to an input terminal of the current conveyor circuit and a drain coupled to a low voltage input current mirror. The current conveyer circuit increases the range of the common mode voltage of the receiver without adversely affecting the functionality of the receiver.