MPL IC Layout Conflict Resolution via Cell Manipulation
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling integrated circuit (IC) feature sizes due to limitations in photolithography tools, leading to the need for multiple patterning lithography (MPL) techniques to achieve minimum spacing below printable thresholds, which often results in coloring conflicts that are difficult to resolve without increasing design area or violating design rules.
Innovation Solution
A computer-implemented system and method for generating MPL-compliant IC layouts using decomposition algorithms, color swapping, and cell manipulation techniques such as flipping, shifting, and pushing to fix coloring conflicts without increasing the design area, utilizing conflict graphs and algorithms like kite list detection and greedy coloring schemes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple patterning lithography is used to achieve minimum spacing below printable thresholds, then manufacturing precision is improved, but device complexity increases due to coloring conflicts
Solution Approach 1:
The patent segments the IC layout into multiple color groups (mask layers) to resolve spacing conflicts. By dividing the single-layer layout problem into multi-layer color assignments, features separated by sub-threshold distances can be placed on different masks, achieving the required minimum spacing while maintaining manufacturing precision.
Solution Approach 2:
The patent transitions from a two-dimensional spatial arrangement problem to a three-dimensional solution space by adding the color/mask dimension. Instead of only adjusting positional coordinates (x,y), the system now operates in (x,y,color) space, allowing features to be separated by assigning different colors (masks) rather than increasing physical distance.
2Manufacturing precision
If coloring conflicts are resolved by increasing design area, then manufacturing precision is improved, but productivity decreases
Solution Approach 1:
The patent employs dynamic, iterative color swapping algorithms that adaptively resolve coloring conflicts without requiring fixed design area expansion. The system dynamically adjusts color assignments through multiple passes of detection and swapping operations, finding solutions that maintain compact layout while achieving MPL compliance.
Solution Approach 2:
The patent changes the color parameters of design features through systematic swapping operations. By detecting coloring conflicts and swapping colors between adjacent features, the system resolves conflicts while maintaining the original design area, thus improving manufacturing precision without sacrificing productivity.
3Manufacturing precision
If decomposition algorithms are used to assign colors to design shapes, then manufacturing precision is improved, but device complexity increases due to algorithm complexity
Solution Approach 1:
The patent segments the complex coloring problem into distinct operational phases: initial color assignment, conflict detection, conflict resolution through swapping, and verification. This segmentation of the algorithm into modular steps makes the overall process more manageable and implementable while achieving precise layout decomposition.
Solution Approach 2:
The patent replaces manual or heuristic coloring methods with automated algorithmic systems. The decomposition algorithm systematically assigns colors, detects conflicts, and resolves them through programmed swapping logic, eliminating the need for manual intervention and providing consistent, repeatable results.
4Manufacturing precision
If cell manipulation techniques are used to fix coloring conflicts, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
Instead of modifying the geometric properties of cells to resolve coloring conflicts, the patent inverts the approach by manipulating color assignments and logical properties of cells. The cell manipulation techniques focus on swapping colors and adjusting mask assignments rather than changing physical cell dimensions or positions, thereby maintaining manufacturing precision with reduced complexity.
Data Source
AI summary
Computer-implemented systems and methods for generating a multiple patterning lithography (MPL) compliant integrated circuit layout are provided. A plurality of integrated circuit (IC) cells are assembled to form an IC layout. The IC layout includes at least two IC cells that abut one another. After the assembling of the IC cells, a decomposition algorithm is executed to assign multiple colors to design shapes within the IC layout. Multiple patterning coloring conflicts are detected in the IC layout after the assigning of the colors to the design shapes. A fixing algorithm is executed, under which a conflict present in two abutting IC cells is fixed by flipping or shifting at least one of the abutting IC cells.