Integrated MPSoC Profiling Environment for Task Scheduling Optimization
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Solution Overview
Problem
Multi-processor System on Chips (MPSoCs) require complex programming techniques to fully utilize their resources, and existing profiling and visualization tools fail to provide a high-level view of processes, leading to difficulties in task partitioning, application mapping, and task scheduling, which can result in applications failing to meet real-time processing requirements.
Innovation Solution
An integrated environment for execution monitoring and profiling of MPSoCs that includes an adaptive task scheduler, graphical user interface for task visualization, and optional debugging capabilities, allowing for real-time or after-execution profiling, and enabling manual optimization through stub tasks and simulated parameters for rapid prototyping and optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If automated task scheduling techniques are used, then productivity is improved, but the ability to provide high-level application code understanding deteriorates
Solution Approach 1:
The patent introduces a profiling tool as an intermediary between the automated scheduling system and the application developer. This tool captures execution data from low-level hardware events and transforms it into high-level application code information, allowing developers to understand and optimize their code without manually dealing with complex hardware scheduling details.
Solution Approach 2:
The patent replaces manual code analysis and optimization processes with an automated profiling system that uses hardware performance counters and event-based monitoring to automatically gather execution statistics, replacing the need for developers to manually trace and analyze low-level hardware behavior.
2Measurement precision
If low-level hardware element profiling is performed, then measurement precision is improved, but ease of operation deteriorates
Solution Approach 1:
The profiling tool acts as an intermediary that automatically collects precise low-level hardware execution data through hardware performance counters and event monitors, then transforms this data into high-level application code metrics, providing both measurement precision and ease of operation through automated data transformation.
Solution Approach 2:
The system creates a virtual model or copy of the application execution at the hardware level using performance counters and event data, allowing developers to analyze execution behavior without directly interacting with complex hardware mechanisms, thus maintaining precision while improving usability.
3Manufacturing precision
If manual optimization through application profiler is performed, then manufacturing precision is improved, but productivity deteriorates
Solution Approach 1:
The profiling tool performs preliminary automated analysis of application execution behavior before the developer begins manual optimization, providing pre-computed statistics and insights that guide the optimization process, thereby reducing the time and effort required to achieve high-quality optimization results.
Solution Approach 2:
The system implements feedback mechanisms where execution data from hardware performance counters is continuously monitored and fed back to the developer through the profiling interface, enabling iterative optimization with immediate visibility into the impact of code changes on actual hardware execution behavior.
Data Source
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AI summary
There is provided a system and method for providing an integrated environment for execution monitoring and profiling of applications running on multi- processor system-on-chips. There is provided a method comprising obtaining task execution data of an application, the task execution data including a plurality of task executions assigned to a plurality of hardware resources, showing a scheduler view of the plurality of task executions on a display, receiving a modification request for a selected task execution from the plurality of task executions, reassigning the plurality of task executions to the plurality of hardware resources based on implementing the modification request, and updating the scheduler view on the display. As a result, the high level results of specific low level optimizations may be tested and retried to discover which optimization routes provide the greatest benefits.