Memory Protection Unit Shadow Registers for Virtualization Overhead
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Solution Overview
Problem
Existing memory protection units in microcontrollers face inefficiencies during virtualization, leading to high runtime access overhead that can cause a significant collapse in computing power, especially under intensive usage.
Innovation Solution
The implementation of a memory protection unit with a static RAM configuration memory and shadow registers, allowing for fast reconfiguration and automatic loading of address regions based on software identifiers, reducing the need for computing core intervention and enabling parallel calculations during MPU reconfiguration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory protection unit is used to check memory accesses for virtualization, then memory access security is improved, but runtime access overhead increases and computing power collapses
Solution Approach 1:
The patent pre-loads address regions into the MPU before virtual machine execution begins. The configuration memory is pre-filled with address region data, and the MPU is pre-configured with permission settings. This preliminary preparation eliminates the need for runtime configuration changes, thereby reducing access overhead while maintaining security checks.
Solution Approach 2:
The patent uses a configuration memory that stores copies of address region information. Instead of repeatedly accessing main memory or re-configuring the MPU for each access, the system maintains pre-copied address region data in the configuration memory, enabling fast comparison operations without compromising security verification.
2Adaptability or versatility
If address regions are loaded into the MPU during runtime, then virtualization flexibility is improved, but reconfiguration time increases
Solution Approach 1:
The system pre-loads multiple address region configurations into the configuration memory before runtime. When virtual machine context switching is needed, the MPU can quickly switch between pre-configured address regions without requiring time-consuming reconfiguration sequences, thus maintaining flexibility while minimizing reconfiguration time.
Solution Approach 2:
The patent extracts the address region configuration data from the main processing path and stores it in a dedicated configuration memory. This separation allows the MPU to perform fast comparison operations using pre-extracted address region information, while configuration changes can be prepared independently without blocking the main execution flow.
3Manufacturing precision
If the computing core intervenes in MPU configuration, then configuration accuracy is improved, but processing overhead increases
Solution Approach 1:
The MPU is designed to autonomously load and configure address regions from the configuration memory without requiring continuous intervention from the computing core. The hardware automatically performs the configuration loading and maintenance tasks, ensuring accurate setup while freeing the computing core to focus on computational work, thereby reducing processing overhead.
Solution Approach 2:
The configuration memory acts as an intermediary between the computing core and the MPU. Instead of the computing core directly configuring the MPU for each access, the configuration memory serves as a buffer that stores pre-prepared address region data, allowing the MPU to self-configure using this intermediate storage and reducing the computational burden on the core.
Data Source
AI summary
A memory protection unit including hardware registers for entering address tables, a configuration memory for storing the address tables, a preconfigured hardware logic for managing the configuration memory, a data connection between the configuration memory and the hardware logic for loading the hardware registers, a first interface for controlling the loading by a computing core, and a second interface for writing to the configuration memory by the computing core.