MRAM Alignment Trenches for Interconnect Precision
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Solution Overview
Problem
The manufacturing of magnetoresistive random access memory (MRAM) devices faces challenges in achieving alignment accuracy between the magnetic tunnel junction (MTJ) and interconnecting structures, leading to insufficient contacting areas and high series resistance as cell sizes decrease.
Innovation Solution
A semiconductor structure and method that includes a substrate with a device region and alignment mark region, a dielectric layer, conductive via, and memory stack structure, where the alignment mark region features a series of trenches that guide the formation of second trenches in the dielectric layer, enhancing alignment accuracy and ensuring proper electrical interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the cell size of the MRAM is reduced to achieve higher density, then the storage capacity increases, but the alignment accuracy between the MTJ and interconnecting structures deteriorates
Solution Approach 1:
The patent introduces alignment marks and alignment trenches in the interconnecting structures before forming the MTJ. These preliminary alignment features guide the subsequent formation of the MTJ, ensuring accurate alignment even as cell sizes are reduced for higher density storage.
Solution Approach 2:
The patent uses alignment marks and alignment trenches as intermediary features that facilitate the alignment process. These intermediaries bridge the gap between the interconnecting structures and the MTJ, enabling precise positioning without directly involving the MTJ in the alignment mechanism.
2Ease of manufacture
If the alignment accuracy between MTJ and interconnecting structures is insufficient, then the manufacturing process becomes easier, but the series resistance increases
Solution Approach 1:
The patent establishes alignment marks and alignment trenches in advance, before forming the MTJ. This preliminary action ensures that when the MTJ is formed, it automatically aligns with the interconnecting structures, maintaining low series resistance without requiring complex alignment procedures.
Solution Approach 2:
The patent replaces complex mechanical alignment systems with a pattern-based alignment approach using alignment marks and trenches. This substitution simplifies the manufacturing process while ensuring accurate alignment and low series resistance through the guided formation process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution improves alignment accuracy between the memory cell structures and interconnecting structures, reducing series resistance and ensuring robust electrical connections, thus enhancing the functionality and reliability of MRAM devices.
Implementation Method 1
performing a dry etching process through the opening to form a first trench and a plurality of second trenches
Data Source
AI summary
A method for forming a semiconductor structure includes the steps of providing a substrate having a device region and an alignment mark region, forming a first dielectric layer on the substrate and a second dielectric layer on the first dielectric layer, forming a conductive via in the second dielectric layer on the device region, forming a mask layer on the second dielectric layer, etching the second dielectric layer and the first dielectric layer through an opening of the mask layer on the alignment mark region to form a first trench through the second dielectric layer and an upper portion of the first dielectric layer and a plurality of second trenches in the first dielectric layer directly under the first trench. Afterward, a memory stack structure is formed on the second dielectric layer, covering the conductive via and filling into the first trench and the second trenches.