MRAM Cell Fabrication Sidewall Capping and Top Electrode Protection
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Solution Overview
Problem
The fabrication of magnetoresistive random access memory (MRAM) cells is hindered by process-induced damage and by-product deposition during etching, leading to increased leakage current and reduced data retention.
Innovation Solution
The method involves using sidewall-capping layers to protect the pin and free layers during etching processes and forming a top electrode layer over the anti-ferromagnetic layer before etching, which reduces damage and polymer deposition, thereby improving the adhesion and reducing leakage current and data retention issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etching processes are used to fabricate MRAM cells, then manufacturing productivity is maintained, but process-induced damage and polymer deposition increase, leading to higher leakage current and reduced data retention
Solution Approach 1:
A sidewall-capping layer is introduced as an intermediary protective layer during etching processes. This capping layer prevents direct interaction between the etchant and the pin/free layers, reducing polymer deposition and damage while allowing the etching process to proceed with standard productivity
Solution Approach 2:
The top electrode layer is formed over the anti-ferromagnetic layer before etching begins. This preliminary action protects the underlying sensitive layers from etch-induced damage and polymer deposition, improving data retention without affecting manufacturing throughput
2Reliability
If conventional etching processes are used to fabricate MRAM cells, then manufacturing productivity is maintained, but process-induced damage increases, leading to higher leakage current
Solution Approach 1:
The sidewall-capping layer serves as a protective intermediary that shields the pin and free layers from direct etchant exposure. This reduces etch-induced damage and the resulting leakage current while maintaining standard etching process parameters and productivity
Solution Approach 2:
The top electrode layer is deposited beforehand to cushion and protect the anti-ferromagnetic layer and underlying structures from etch process damage. This preliminary protection reduces damage accumulation and minimizes leakage current generation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes etch-process-induced damage and polymer deposition, enhancing the performance and reliability of MRAM cells by reducing leakage current and improving data retention.
Implementation Method 1
Each MRAM cell includes a magnetic tunnel junction ('MTJ') cell, the resistance of which can be adjusted to represent logic '0' or logic '1'. The MTJ includes a stack of films. The MTJ cell is coupled between top and bottom electrodes and an electric current flowing through the MTJ cell from one electrode to the other may be detected to determine the resistance, and therefore the logic state.
Data Source
AI summary
A method of fabricating a semiconductor device includes forming a stack of film comprising an anti-ferromagnetic layer, the pin layer, a barrier layer, a free layer and a bottom electrode layer. The method also includes forming a first patterned hard mask over the anti-ferromagnetic layer, etching the anti-ferromagnetic layer and the pin layer by using the first patterned hard mask as a first etch mask, forming a first capping layer along sidewalls of the anti-ferromagnetic layer and the pin layer, etching the barrier layer and the free layer by using first patterned hard mask and the first capping layer as a second etch mask, forming a second capping layer over the first capping layer and extending along sidewalls of the barrier layer and the free layer, exposing the anti-ferromagnetic layer and forming a top electrode layer over the exposed anti-ferromagnetic layer.