MRAM Cell Fabrication Sequence for Narrow Read Window

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Solution Overview

Problem

Magnetic memory devices face challenges in achieving a sufficiently narrow read window due to process variations and structural variations in metal layers, which broaden the full-width-half-maxima (FWHM) of resistance peaks, affecting the reliability of data storage in magnetic tunnel junction (MTJ) based MRAM cells.

Innovation Solution

Forming the MRAM cell before the first metal interconnect during the middle-end-of-line (MEOL) operation, before the back-end-of-line (BEOL) process, minimizes signal contributions from metal routings and reduces the impact of process variations, thereby narrowing the FWHM of resistance peaks and enhancing the read window.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal interconnect layers are formed before the MRAM cell, then metal routing signals are present during measurement, but the full-width-half-maxima (FWHM) of resistance peaks broadens due to process variations and structural variations in metal layers

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidFWHM of resistance peaks
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The MRAM cell is formed before the first metal interconnect layer during the middle-end-of-line (MEOL) operation. This preliminary formation of the memory cell structure before metal routing allows measurement of resistance peaks without contamination from metal layer variations, thereby achieving narrower FWHM and improved data storage reliability

Inventive Principle:
Principle #10Preliminary action

2Reliability

If metal interconnect layers are formed before the MRAM cell, then routing signals are included in measurements, but the read window becomes wider due to signal contributions from metal routings

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidread window
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The MRAM cell is formed in advance during MEOL before BEOL metal interconnect formation. This timing arrangement ensures that resistance measurements are taken without the presence of metal routing signals, resulting in a narrower read window and reduced device complexity

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If conventional fabrication process is used with metal layers formed first, then manufacturing is simpler, but the processing window during CMP operations is narrower

Engineering Contradiction:
Improvefabrication processVSAvoidprocessing window during CMP
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The MRAM cell is formed before metal interconnect layers during MEOL, which provides a wider processing window for subsequent CMP operations. This sequencing allows better control over the fabrication process while maintaining ease of manufacture through standard BEOL metallization processes

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a narrower read window for MRAM cells, improving data storage reliability by reducing the influence of process variations and allowing for a wider processing window during CMP operations, leading to more consistent resistance levels for 'low' and 'high' logic states.

Implementation Method 1

current flows through the insulating barrier by quantum mechanical tunneling

Methodology Applied
Scientific EffectQuantum mechanical tunneling:

Implementation Method 2

An example data storing mechanism for a magnetic memory device is a tunnel magneto resistance (TMR) effect of a magnetic tunnel junction (MTJ)

Methodology Applied
Scientific EffectTunnel magneto resistance (TMR) effect:

Data Source

PatentUS20240341102A1Method for fabricating semiconductor device
Publication Date: 2024.10.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240341102A1 patent drawing
  • US20240341102A1 patent drawing
  • US20240341102A1 patent drawing

AI summary

The present disclosure provides a method for fabricating a semiconductor device. The method includes the operations below. A magnetic tunneling junction (MTJ) is formed on a substrate. A first dielectric layer is formed around the MTJ. A first metal interconnection is formed adjacent to the MTJ. A second dielectric layer is formed over the first dielectric layer. The second dielectric layer is removed to form an opening. A metal line is formed in the opening to electrically connect the MTJ and the first metal interconnection.