MRAM Cell Design with Series-Parallel MTJ Configurations

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Solution Overview

Problem

The challenge in memory systems is to reduce the number of transistors used while maintaining high density and efficiency, particularly in magnetoresistive random access memory (MRAM) devices, where conventional architectures limit pitch and density due to individual transistors for each magnetic tunnel junction (MTJ).

Innovation Solution

Configuring two or more MTJs in series or parallel configurations with a common transistor, allowing for reduced transistor count, increased density, and varied resistance states through distinct magnetic characteristics and AC frequency tuning for improved write accuracy and endurance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If individual transistors are used for each MTJ, then write accuracy and reliability are improved, but device density and array pitch are reduced

Engineering Contradiction:

Improvewrite accuracyVSAvoiddevice density

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

Multiple MTJs are merged into a single memory cell sharing one transistor. The patent combines two or more MTJs in parallel within a cell, allowing them to be controlled by a common transistor while maintaining individual magnetic characteristics for selective writing through frequency differentiation.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces dynamic frequency tuning capability where each MTJ is assigned a distinct natural frequency. By dynamically adjusting the AC current frequency, the system can selectively write to specific MTJs within a cell, maintaining write accuracy without requiring individual transistors for each MTJ.

Inventive Principle:

Principle #15Dynamics

2Manufacturing precision

If more transistors are used per MTJ, then write control precision is improved, but manufacturing complexity and device cost increase

Engineering Contradiction:

Improvewrite control precisionVSAvoidtransistor count

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

A single transistor serves multiple MTJs within a memory cell, performing the function of write control for all MTJs in that cell. The transistor's gate controls the current flow to multiple parallel MTJs, reducing the total transistor count while maintaining control capability through frequency-based selection.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the control parameter from transistor-level control to frequency-level control. By varying the frequency of the AC current applied to the shared transistor, the system can selectively activate specific MTJs based on their natural frequencies, achieving precise control without increasing transistor count.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If MTJs are configured in series, then transistor count is reduced, but resistance variation and readout complexity increase

Engineering Contradiction:

Improvetransistor efficiencyVSAvoidreadout complexity

Core Design Contradiction:

ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent transitions from series configuration to parallel configuration within a cell. By arranging MTJs in parallel, each MTJ contributes additively to the total conductance, creating distinct resistance states that are easier to detect and differentiate during readout operations.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the number of transistors required, increases memory array density, and enhances write error rates and device endurance by utilizing distinct magnetic characteristics and AC frequency adjustments.

Implementation Method 1

Due to the spin-polarized electron tunneling effect, the electrical resistance of the cell changes due to the relative orientation of the magnetization of the two layers

Methodology Applied

Scientific EffectSpin-polarized electron tunneling:

Implementation Method 2

Magnetoresistive random access memory (MRAM) is a non-volatile memory technology that stores data through magnetic storage elements

Methodology Applied

Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 3

a vertical stack of MTJs is connected to an AC source with frequency that is selectively tuned to be close to the intrinsic free-layer precession frequencies of the individual devices

Methodology Applied

Scientific EffectPrecession: Precession

Data Source

PatentUS10937478B2Systems and methods utilizing serial and parallel configurations of magnetic memory devices

Publication Date: 2021.03.02 INTEGRATED SILICON SOLUTION CAYMAN INC

AI summary

An apparatus includes two or more magnetic tunnel junctions (MTJs), including a first MTJ having a first magnetic characteristic and a second MTJ having a second magnetic characteristic. The first magnetic characteristic is distinct from the second magnetic characteristic. The first magnetic characteristic is based on a first magnetic anisotropy and a first offset field on a first storage layer of the first MTJ. The second magnetic characteristic is based on a second magnetic anisotropy and a second offset field on a second storage layer of the second MTJ, The apparatus further includes a metallic separator coupling the first MTJ with the second MTJ, wherein the first MTJ and the second MTJ are arranged in series.