MRAM Conductive Oxide Stack for Lower Series Resistance
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Solution Overview
Problem
MRAM cells face challenges with increasing series resistances due to thick insulating oxide layers, which affect device performance by adding resistance and requiring higher write voltages, while maintaining good retention and avoiding spin pumping.
Innovation Solution
The fabrication method involves depositing an amorphous reactive material on an insulating oxide layer, followed by a stack annealing process that reacts to form a conductive oxide layer, reducing series resistance and improving crystallinity of the free and reference layers in MRAM devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick insulating oxide layer is used to maintain good retention and avoid spin pumping, then retention is improved, but series resistance increases
Solution Approach 1:
The oxide layer is segmented into two distinct functional layers: a thick insulating oxide layer (first oxide layer) that provides retention and prevents spin pumping, and a thin conductive oxide layer (second oxide layer) that provides low series resistance. This segmentation allows each layer to optimize its specific function without compromising the other.
Solution Approach 2:
Different regions of the oxide structure are assigned different electrical properties: the bulk oxide region has high insulation properties for retention, while the interface region (second oxide layer) has high conductivity for low series resistance. This local differentiation of properties resolves the contradiction between retention and resistance.
2Object-generated harmful factors
If a thick insulating oxide layer is used to reduce spin pumping, then spin pumping is reduced, but series resistance increases
Solution Approach 1:
The oxide structure is divided into two layers with distinct thicknesses and properties: a thick first oxide layer that suppresses spin pumping effects, and a thin second oxide layer that provides conductive pathways to minimize series resistance. The segmentation enables simultaneous achievement of both goals.
Solution Approach 2:
The thin conductive oxide layer acts as an intermediary between the thick insulating oxide layer and the magnetic layers, providing a conductive pathway that reduces series resistance while the thick insulating layer maintains its spin pumping suppression function.
3Object-affected harmful factors
If series resistance is reduced by thinning the oxide layer, then series resistance decreases, but retention and spin pumping protection deteriorate
Solution Approach 1:
Rather than uniformly thinning the oxide layer, the structure segments the oxide into two layers: a thin conductive layer at the interface that reduces series resistance, and a thick insulating layer in the bulk that maintains retention and spin pumping protection. This resolves the contradiction by localizing the thinning to only where it is needed for resistance reduction.
4Stability of the object's composition
If a thick insulating oxide layer is used, then device stability is improved, but write voltage requirements increase
Solution Approach 1:
The oxide structure is segmented to provide a thick insulating layer for stability while adding a thin conductive layer that reduces the overall series resistance, thereby lowering the write voltage required to switch the device state without compromising stability.
Solution Approach 2:
The electrical parameters of the oxide structure are optimized by creating a composite structure with different resistance characteristics in different regions, changing the overall resistance parameter to reduce write voltage while maintaining the stability provided by the thick insulating portion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces series resistance, enhances the growth of free and reference layers, and maintains low resistance, thereby improving MRAM device performance and reducing write voltages.
Implementation Method 1
a stack annealing process is performed on the semiconductor device. During the stack annealing process, the amorphous reactive material reacts with and shunts the insulating oxide layer to form a conductive oxide layer
Implementation Method 2
The conductive amorphous metal layer is initially deposited as an amorphous structure and becomes crystalline after the stack annealing process. Likewise, the amorphous bottom electrode layer may initially be deposited as an amorphous structure and may become crystalline after the stack annealing process
Implementation Method 3
MRAM cells exploit the quantum mechanical effect of electron tunneling through an insulating layer disposed between two ferromagnetic layers
Implementation Method 4
The tunnel magnetoresistance (TMR) of the MRAM cell can be switched between a first state of low resistance where the two ferromagnetic layers have parallel magnetic dipole moments, and a second state of high resistance, where the two ferromagnetic layers have antiparallel magnetic dipole moments
Data Source
AI summary
A semiconductor device that includes a substrate, a crystalline bottom electrode layer on an upper side of the semiconductor substrate, a conductive crystalline metal layer above the crystalline bottom electrode layer, and a conductive oxide layer above the conductive crystalline metal layer. The conductive oxide layer has a low resistance. The semiconductor device also includes a magnetic tunnel junction (MTJ) above the conductive crystalline metal layer, the MTJ including a tunnel barrier layer, a free layer on a first side of the tunnel barrier layer and a reference layer on a second side of the tunnel barrier layer opposite the first side.