Delayed Write-Back in MRAM with Calibration Support
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Solution Overview
Problem
Magnetoresistive memory devices, such as MRAM, face significant delays in write-back operations due to the need to avoid damaging sensitive layers with large write current pulses, leading to extended write-back times that can impact overall throughput and timing of data access operations.
Innovation Solution
Implementing a delayed write-back strategy where data is written back to the array only after the next page has been activated, allowing concurrent read/write operations without interfering with the write-back process, and using additional circuitry or techniques to support calibration sequences without affecting the non-volatile nature of the data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If large write current pulses are used to write data back to the array, then write speed is improved, but the sensitive layers are damaged
Solution Approach 1:
The patent applies preliminary action by performing the write operation before the read operation, and delaying the write-back to the array until after the read operation is complete. This timing arrangement allows the write current to be applied in advance when it is less likely to interfere with subsequent read operations and sensitive layer operations, thus improving write speed while preventing damage to sensitive layers.
Solution Approach 2:
The patent implements beforehand cushioning by introducing a delay period between the read operation and the write-back operation. During this delay period, the write data is held in buffer memory without being written back to the array, providing a protective cushion that prevents the write current pulse from immediately following the read operation and potentially damaging the sensitive layers.
2Productivity
If write-back is delayed until after next page activation, then throughput is improved, but data access timing is extended
Solution Approach 1:
The patent applies continuity of useful action by overlapping the write-back operation with the activation of the next page. While the next page is being activated and prepared for read operations, the write-back to the array is performed in parallel, ensuring continuous useful action without idle periods. This improves throughput by eliminating sequential delays while managing data access timing through proper buffer management.
Solution Approach 2:
The patent uses buffer memory as an intermediary to decouple the write operation from the read operation. The buffer temporarily holds write data during the delay period, acting as a mediator that allows the write-back to be postponed without losing data or disrupting the read operation timing, thus improving throughput while maintaining acceptable data access timing.
3Measurement precision
If calibration sequences are performed, then measurement precision is improved, but non-volatile data may be affected
Solution Approach 1:
The patent applies segmentation by dividing the memory array into multiple banks and performing calibration on only one bank at a time. This allows calibration sequences to be executed with high precision on a segmented portion of the array without affecting the integrity of data in other banks, thus improving measurement precision while maintaining data reliability through spatial separation.
Solution Approach 2:
The patent implements local quality by applying calibration operations locally to specific banks or regions of the memory array rather than globally to the entire array. This localized approach allows precise calibration of specific areas that need it while leaving other areas with stable data untouched, thus improving measurement precision where needed while preserving data integrity elsewhere.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves latency and throughput by hiding the write-back delay, enabling continuous read/write operations while the write-back occurs, and ensures data integrity by avoiding premature write-backs that could damage the memory device.
Implementation Method 1
The resistance in each magnetic tunnel junction can be varied based on the relative magnetic states of the magnetoresistive layers within the magnetoresistive stack
Implementation Method 2
Spin-torque magnetic memory devices store information by controlling the resistance across a magnetic tunnel junction (MTJ)
Data Source
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AI summary
A memory having a delayed write-back to the array of data corresponding to a previously opened page allows delays associated with write-back operations to be avoided. After ail initial activation opens a first page and the read/write operations for that page are complete, write-back of the open page to the array of memory cells is delayed until after completion of a subsequent activate operation that opens a new page. Techniques to force a write-back in the absence of another activate operation are also disclosed. Calibration and testing sequences are also supported in which a non-destructive mode preserves data stored in a non-volatile memory array and status bits used to indicate open pages are cleared so later inadvertent delayed write-back operations as a result of the calibration or testing do not corrupt the non- volatile data.