Two-Stage MRAM Encoder for Low-Current Trim Decoding
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Solution Overview
Problem
Magnetoresistive Random Access Memory (MRAM) cells experience read errors due to process variations causing overlap in resistance values for high (RH) and low (RL) states, leading to inefficiencies in data storage and increased standby currents in Sense Amplifiers (SAs).
Innovation Solution
The implementation of a simplified encoding system using symmetric characteristics of unary codes, swapping logic gate inputs, and reducing the size of decoders from 15:1 to 7:1, along with AND and NOR gates, to minimize standby currents and area occupancy in MRAMs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional 15:1 decoder is used in the encoder, then complete decoding coverage is achieved, but the implementation area and standby current are excessive
Solution Approach 1:
The encoder is divided into two stages: a first stage that processes the most significant bits and a second stage that processes the least significant bit. This segmentation allows the use of a smaller 7:1 decoder in the first stage instead of a full 15:1 decoder, reducing area while maintaining decoding coverage through coordinated two-stage operation
Solution Approach 2:
The encoding problem is transformed from a single-stage 15:1 decoding task into a two-dimensional approach where the first stage handles bits [2:0] with a 7:1 decoder and the second stage handles bit [3] with simple logic gates, effectively distributing the decoding complexity across multiple dimensions
2Reliability
If a conventional 15:1 decoder is used in the encoder, then complete decoding coverage is achieved, but the standby current is excessive
Solution Approach 1:
The encoder is divided into two stages: a first stage that processes the most significant bits and a second stage that processes the least significant bit. This segmentation allows the use of a smaller 7:1 decoder in the first stage instead of a full 15:1 decoder, reducing area while maintaining decoding coverage through coordinated two-stage operation
Solution Approach 2:
The encoding problem is transformed from a single-stage 15:1 decoding task into a two-dimensional approach where the first stage handles bits [2:0] with a 7:1 decoder and the second stage handles bit [3] with simple logic gates, effectively distributing the decoding complexity across multiple dimensions
3Ease of manufacture
If process variations are present in MRAM cells, then manufacturing is feasible, but resistance value overlap occurs leading to read errors
Solution Approach 1:
The encoder performs preliminary encoding of the data bits before the read operation, generating thermally-assisted trim codes that prepare the sense amplifier for the upcoming read. This preliminary action ensures that the sense amplifier is properly configured to distinguish between RH and RL states even when process variations cause resistance overlap
Solution Approach 2:
The encoding system uses feedback from the encoded trim codes to adjust the sense amplifier's threshold, creating a closed-loop system that compensates for process variations. The encoder's output directly influences the sense amplifier's operating point, ensuring accurate reading despite manufacturing variations
Data Source
AI summary
An encoding system may be provided. The encoding system may comprise a first stage and a second stage. The first stage may be configured to receive a first input, decode the first input, and produce a first output comprising the decoded first input. The second stage may be configured to receive a second input, receive the first output from the first stage, and convert the first input and the second input from a first coding system to a second coding system based on the second input and the first output. The second stage may produce a second output comprising the converted first input and the converted second input.