MRAM Read Methods Using Incubation Delay for Speed and Reliability

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Solution Overview

Problem

Conventional MRAM devices face reliability concerns due to undesired write operations during read operations (read disturb) and write operations (write disturb), requiring low voltages that slow down read operations and complicate circuit designs.

Innovation Solution

Implementing an incubation delay interval in MRAM bit-cells allows for higher voltage read operations by ensuring the voltage is removed before the end of the incubation delay, preventing unintended write operations and enhancing read speed and circuit robustness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a very low applied voltage is used for data read operations to prevent read disturb failures, then reliability is improved, but read speed deteriorates and additional voltage requirements complicate circuit designs

Engineering Contradiction:
Improveread operation reliabilityVSAvoidread operation speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies preliminary action by removing the voltage signal from the MRAM bit-cell before the end of the incubation delay interval during read operations. This preemptive removal prevents the voltage from reaching levels that would cause unintended write operations, thereby maintaining reliability while allowing higher read voltages to be used for faster read speeds.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the temporal parameter of voltage application by introducing an incubation delay interval and removing the voltage signal before this interval ends. This parameter change allows the system to use higher voltages for faster reading while preventing the conditions that lead to read disturb, thus resolving the contradiction between speed and reliability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a very low applied voltage is used for data read operations to prevent read disturb failures, then reliability is improved, but circuit design complexity increases due to additional voltage requirements

Engineering Contradiction:
Improveread operation reliabilityVSAvoidcircuit design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by using a single voltage signal for both read and write operations. By removing the voltage signal before the end of the incubation delay interval during reads, the same voltage line serves dual purposes, eliminating the need for separate dedicated read voltage circuits and reducing overall circuit complexity while maintaining reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the temporal parameter of voltage application to allow a single voltage signal to serve multiple functions. By controlling the duration of voltage application (removing it before the incubation delay ends), the system can use the same voltage for both reads and writes, simplifying circuit design while preventing read disturb.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If higher voltage is used for read operations to increase read speed, then productivity is improved, but read disturb occurs causing reliability deterioration

Engineering Contradiction:
Improveread operation speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by removing the voltage signal before the end of the incubation delay interval during read operations. This preemptive removal prevents the voltage from reaching levels that would cause unintended write operations, thereby maintaining reliability while allowing higher read voltages to be used for faster read speeds.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies the skipping principle by rapidly applying and removing the voltage signal within the incubation delay interval. The voltage is applied briefly to enable fast reading, then removed before it can cause disturb effects, thus achieving high speed while preventing reliability issues.

Inventive Principle:
Principle #21Skipping (Rushing through)

4Productivity

If write current exceeding critical switching current is applied to change magnetization direction, then write operation effectiveness is improved, but write disturb occurs causing unintended switching

Engineering Contradiction:
Improvewrite operation effectivenessVSAvoidbit-cell stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by removing the voltage signal before the end of the incubation delay interval during read operations, preventing read disturb. Additionally, by using higher read voltages within the controlled time window, the patent reduces the need for excessively high write currents, thereby reducing write disturb effects while maintaining effective write operations.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables faster and more reliable read operations at higher voltages without causing data disturbances, simplifying circuit designs and eliminating the need for dedicated read voltages, while maintaining device endurance.

Implementation Method 1

providing a voltage signal across one or more storage elements of the MRAM bit-cell for a duration less than an incubation delay interval of the one or more storage elements

Methodology Applied
Scientific EffectIncubation delay interval:

Data Source

PatentUS10593397B1MRAM read and write methods using an incubation delay interval
Publication Date: 2020.03.17 ARM LTD
  • US10593397B1 patent drawing
  • US10593397B1 patent drawing
  • US10593397B1 patent drawing

AI summary

In a particular implementation, a method to perform a read operation on a magneto-resistive random-access memory (MRAM) bit-cell includes: providing a voltage signal across one or more storage elements of the MRAM bit-cell, determining an electrical resistance of the one or more storage elements of the MRAM bit-cell, and removing the voltage signal from the MRAM bit-cell prior to an end of an incubation delay interval.