MRAM Interconnect Via Inversion for Defect Reduction
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Solution Overview
Problem
Existing interconnecting technologies for MRAM-based magnetic devices face challenges with high defectivity and larger cell sizes due to shallow vias and thin dielectric layers in semiconductor back-end processing.
Innovation Solution
An alternative via technology is introduced where the via extends from the metal above the strap, allowing direct electrical contact between the strap and the lower metal, enhancing processing efficiency and reducing defects, and utilizing a refractory metal or resistive material for the strap to achieve better electrical contact and local heating capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vias extend downwardly from upper metallic stud to lower metallic stud through thin dielectric layers, then electrical connection is achieved, but processing difficulty and defectivity increase
Solution Approach 1:
The patent inverts the conventional via approach by extending the via upwardly from the lower metallic stud to contact the strap, rather than extending it downwardly from the upper metallic stud. This inversion allows the via to be formed through thicker dielectric layers, avoiding the processing difficulties and high defectivity associated with shallow vias through thin dielectric layers, while still achieving reliable electrical connection.
2Force
If strap is placed close to metallic field line to obtain higher magnetic fields, then magnetic field strength increases, but processing complexity increases
Solution Approach 1:
The patent segments the electrical connection path into distinct portions: a via extending upwardly from the lower metallic stud to contact the strap, and a separate via extending downwardly from the upper metallic stud. This segmentation allows the strap to be positioned close to the metallic field line for enhanced magnetic field strength while simplifying the overall interconnection structure by avoiding the need for complex shallow via configurations.
3Ease of manufacture
If via configuration is optimized for processing performance, then manufacturing defectivity decreases, but cell size increases
Solution Approach 1:
The patent utilizes the vertical dimension effectively by extending vias upwardly from lower metallic studs through dielectric layers to contact the strap, rather than relying solely on lateral positioning. This dimensional approach allows for optimized processing performance with reduced defectivity while maintaining compact cell size, as the vertical via extension does not increase the lateral footprint of the magnetic device cell.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces manufacturing defects and allows for smaller MRAM-based magnetic device cell sizes while maintaining processing performance, enabling more efficient and reliable electrical connections.
Implementation Method 1
utilizing a refractory metal or resistive material for the strap to achieve better electrical contact and local heating capabilities
Data Source
Figure 1~3
Figure 4~5(c)
Figure 6
AI summary
Electrical interconnecting device (10) comprising: a magnetic tunnel junction (2); a strap portion (7) electrically connecting a lower end of the magnetic tunnel junction (2); a current line portion (3') electrically connecting an upper end of the magnetic tunnel junction (2); an upper metallic stud (8) electrically connecting a lower metallic stud (5) through a via (6); the strap portion (7) being in direct electrical contact with the via (6), such that a current passing in the magnetic tunnel junction (2) flows directly between the strap portion (') and the via (6) and between the via (6) and the lower metallic stud (5) or the upper metallic stud (8).