MRAM NOR Emulation With Parallel Page Writing
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Solution Overview
Problem
Existing MRAM devices face limitations in efficiently emulating NOR memory operations and managing data throughput, particularly in handling page program operations with fixed-size page buffers, which can lead to overwriting of data and reduced writing speed.
Innovation Solution
The MRAM device operates in two modes: NOR emulation mode, where it emulates NOR Flash programming with a fixed-size page buffer, and persistent memory mode, allowing parallel writing to cache and main memory array, enabling flexible data size handling from 1 byte to infinity, and utilizing multiple array banks for enhanced speed and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If MRAM device operates in NOR emulation mode with fixed-size page buffer, then it emulates NOR Flash programming, but data throughput is reduced and writing speed decreases due to overwriting limitations
Solution Approach 1:
The system dynamically switches between NOR emulation mode and persistent memory mode based on operational requirements. In persistent memory mode, the fixed page buffer constraint is removed, allowing continuous writing without overwriting, thereby maximizing data throughput while maintaining the ability to emulate NOR Flash when needed
Solution Approach 2:
The patent changes the operational parameters of the MRAM device by introducing multiple operating modes. The page buffer size and writing behavior parameters are adjusted between modes: in NOR emulation mode, a fixed page buffer size is used with overwrite behavior, while in persistent memory mode, the buffer constraint is removed allowing unlimited data accumulation
2Adaptability or versatility
If MRAM device uses fixed-size page buffer for NOR emulation, then NOR Flash programming is emulated, but writing speed is reduced due to sequential writing constraints
Solution Approach 1:
The writing speed is dynamically optimized by switching between modes. In persistent memory mode, parallel writing operations can be performed across multiple banks without the sequential constraints of NOR emulation, achieving maximum writing speed while the system retains the capability to switch to NOR emulation mode when compatibility is required
3Productivity
If MRAM device operates in persistent memory mode with parallel writing, then data throughput is enhanced, but device complexity increases due to mode management
Solution Approach 1:
The mode selection and management is handled automatically by the control logic within the MRAM device based on predefined conditions and configuration bits. This self-service approach minimizes the burden on external controllers while enabling the system to achieve high data throughput through persistent memory mode operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances writing speed and efficiency by allowing parallel operations, overcoming the limitations of fixed-size page buffers, and supports flexible data handling, improving data throughput and emulation capabilities.
Implementation Method 1
The resistance in each MTJ can be varied based on the relative magnetic states of the magnetoresistive layers within the magnetoresistive stack
Implementation Method 2
information can be stored by setting the orientation of the free portion
Data Source
AI summary
The present disclosure is drawn to, among other things, a method of managing a magnetoresistive memory (MRAM) device. In some aspects, the method includes receiving a configuration bit from a write mode configuration register. In response to determining the configuration bit is a first value, the MRAM device is operated in a NOR emulation mode. In response to determining the configuration bit is a second value, the MRAM device is operated in a persistent memory mode.