MRAM Read Disturbance via Adjacent Bit Line Compensation
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Solution Overview
Problem
Spin-transfer-torque-write MRAMs face challenges in increasing read current without causing read disturbance, which limits their ability to replace high-speed DRAMs due to the need for decreased read current to prevent write errors.
Innovation Solution
The implementation of a read method that supplies a second current to adjacent bit lines to generate a magnetic field that suppresses write errors during read operations, allowing for higher read currents while minimizing disturbance by using a driver to apply voltages to bit and source lines, thereby controlling the magnetic field in the memory cell.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the read current is increased to improve read speed and signal strength, then the read operation becomes faster and more reliable, but the possibility of occurrence of write errors (read disturbance) in memory cells increases
Solution Approach 1:
The patent applies preliminary anti-action by generating a compensatory magnetic field before the read current can cause harmful effects. The driver supplies compensation currents to adjacent bit lines that create magnetic fields opposing the write error-inducing field from the read current, thereby preventing read disturbance before it occurs.
Solution Approach 2:
The patent uses magnetic field compensation as an intermediary mechanism. The compensation currents flowing through adjacent bit lines generate magnetic fields that act as mediators to counterbalance the harmful magnetic field produced by the read current, thereby protecting the memory cell from write errors while allowing high read currents to flow.
2Reliability
If the read current is decreased to prevent read disturbance, then write errors are reduced, but the resistance against variations in circuit decreases and read speed decreases
Solution Approach 1:
The compensation magnetic field generated by adjacent bit lines serves as an intermediary protective mechanism. This external magnetic field compensation allows the system to maintain high read currents while preventing write errors, effectively decoupling the trade-off between read speed and reliability.
Solution Approach 2:
The patent changes the magnetic field parameter by introducing compensatory magnetic fields from adjacent bit lines. This parameter change enables the system to tolerate higher read currents without causing write errors, thereby improving read speed while maintaining reliability.
3Productivity
If high read current is used to achieve high-speed operation, then read speed improves, but read disturbance occurs causing write errors in memory cells
Solution Approach 1:
The system performs preliminary anti-action by pre-establishing compensatory magnetic fields through adjacent bit lines before the read current flows through the selected bit line. This prevents read disturbance and maintains data integrity while enabling high-speed read operations.
Solution Approach 2:
The patent implements a feedback mechanism where the driver monitors the read operation and supplies compensation currents to adjacent bit lines based on the detected read current magnitude. This feedback loop ensures that the compensatory magnetic field adequately counterbalances the harmful effects of high read current, maintaining both speed and data integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables higher read currents in MRAMs, reducing read disturbance and enhancing the scalability and speed of spin-transfer-torque-write MRAMs, making them more suitable for high-capacity and high-speed applications.
Implementation Method 1
the driver supplies a second current to second bit lines among other bit lines, which are close to the first bit line through which the first current has flowed, and the second current generates a magnetic field in a direction to suppress a write error in the memory cell
Implementation Method 2
The magnetoresistive random access memory (MRAM) is a device that stores information by using the magnetoresistive effect
Implementation Method 3
a spin-transfer-torque-write MRAM using magnetization reversal caused by spin current transfer
Data Source
AI summary
A word line voltage is applied to a plurality of word lines. A read/write voltage is applied to a plurality of bit lines. The read/write voltage is applied to a plurality of source lines. A word line selector selects the word line and applies the word line voltage. A driver applies a predetermined voltage to the bit line and the source line, thereby supplying a current to the memory cell. A read circuit reads a first current having flowed through the memory cell, and determines data stored in the memory cell. When performing the read, the driver supplies a second current to second bit lines among other bit lines, which are adjacent to the first bit line through which the first current has flowed. The second current generates a magnetic field in a direction to suppress a write error in the memory cell from which data is to be read.