MRAM Read-Write Selector Segmentation for Disturbance Control

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Solution Overview

Problem

Current non-volatile memory technologies, such as flash RAM, face challenges in optimizing read and write operations without compromising data integrity and endurance, particularly in magnetoresistive random-access memory (MRAM) devices where separate control of read and write paths is necessary to prevent data disturbance.

Innovation Solution

The implementation of distinct read and write selectors with different turn-on voltages and on-resistances allows for separate control of read and write paths in MRAM devices, ensuring that the read margin is preserved while suppressing write and read disturbances, by disconnecting the write path during read operations and vice versa.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single selector is used for both read and write operations in MRAM, then device complexity is reduced, but data disturbance occurs during operations

Engineering Contradiction:
Improveselector structureVSAvoiddata integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the single selector into two separate selectors: a first selector for write operations and a second selector for read operations. This segmentation allows independent optimization of each selector's characteristics, enabling the write selector to have lower turn-on voltage for efficient writing while the read selector maintains higher turn-on voltage to prevent read disturbance, thereby resolving the conflict between device complexity and data integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different electrical characteristics to different selectors based on their specific functional requirements. The write selector is designed with lower turn-on voltage and lower on-resistance optimized for write operations, while the read selector has higher turn-on voltage and higher on-resistance optimized for read operations. This local quality differentiation enables each selector to perform its specific function optimally without compromising data integrity.

Inventive Principle:
Principle #3Local quality

2Productivity

If write selector has low turn-on voltage for efficient writing, then write operation efficiency improves, but read disturbance increases

Engineering Contradiction:
Improvewrite operation efficiencyVSAvoidread disturbance
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

By segmenting the selector function into separate write and read selectors, the patent enables the write selector to operate at low turn-on voltage for high write efficiency while the read selector operates at higher turn-on voltage to prevent read disturbance. The segmentation isolates the harmful effect of low voltage to only the write path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a control circuit as an intermediary that manages the operation of both selectors. The control circuit receives operation commands and selectively activates either the write selector or read selector based on whether a write or read operation is required, preventing simultaneous activation that would cause read disturbance during write operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If read selector has high turn-on voltage to prevent read disturbance, then data integrity improves, but read path resistance increases

Engineering Contradiction:
Improvedata integrityVSAvoidvoltage drop
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent optimizes the read selector's electrical characteristics specifically for read operations by designing it with higher turn-on voltage and higher on-resistance. This local quality optimization ensures sufficient voltage margin during read operations to prevent read disturbance, while the higher resistance is acceptable since read operations require lower current compared to write operations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the electrical parameters of the read selector to have higher turn-on voltage and higher on-resistance compared to the write selector. This parameter change is strategically made to prioritize data integrity during read operations, accepting the trade-off of higher resistance since it does not significantly impact overall system performance.

Inventive Principle:
Principle #35Parameter changes

4Measurement precision

If separate read and write selectors are implemented, then operational control precision improves, but device complexity increases

Engineering Contradiction:
Improveoperational control precisionVSAvoidselector configuration
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the selector functionality into two distinct selectors with different characteristics, enabling precise control over read and write operations independently. This segmentation achieves operational control precision by allowing each selector to be optimized for its specific operation type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a universal control circuit that manages both selectors through a unified interface. The control circuit receives operation commands and automatically routes them to the appropriate selector, providing multi-functional control that manages the complexity of having separate selectors while maintaining a streamlined control architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the operational efficiency and data integrity of MRAM devices by optimizing read and write operations independently, reducing voltage drop and maintaining a higher read margin without compromising disturbance suppression.

Implementation Method 1

Magnetoresistive random-access memory (MRAM), which uses electron spin to store data

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 2

a magnetic tunnel junction (MTJ)

Methodology Applied
Scientific EffectTunnel magnetoresistance:

Implementation Method 3

programmed by polarized carriers to switch a magnetization direction of the free layer

Methodology Applied
Scientific EffectSpin transfer torque:

Implementation Method 4

distinct read and write selectors with different turn-on voltages and on-resistances

Methodology Applied
Scientific EffectElectrical resistance: Electrical Resistance

Data Source

PatentUS11145347B1Memory device and memory circuit
Publication Date: 2021.10.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11145347B1 patent drawing
  • US11145347B1 patent drawing
  • US11145347B1 patent drawing

AI summary

A memory device and a memory circuit is provided. The memory device includes a magnetic tunnel junction (MTJ), a read word line, a read selector, a write word line and a write selector. The read word line is connected to the MTJ with the read selector in between. The read word line is electrically connected to the MTJ when the read selector is turned on, and electrically disconnected from the MTJ when the read selector is in an off state. The write word line is connected to the MTJ with the write selector in between. The write word line is electrically connected to the MTJ when the write selector is turned on, and electrically disconnected from the MTJ when the write selector is off. A turn-on voltage of the write selector is greater than a turn-on voltage of the read selector.