MRAM Reference Bit Recovery for Field Disturb Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices, particularly MRAM, face inefficiencies in error detection and recovery due to disturbed reference bits, which can lead to read errors and potential data tampering, with current double bit error detection schemes being insufficient to guarantee detection of all failures.
Innovation Solution
Implementing a self-healing mechanism that toggles ECC words twice and reads data from multiple ECC words to detect double bit errors, resetting reference bits upon detection, and using a write verify sequence to ensure data integrity and recover functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference bits are used to determine memory bit states, then read operations can be performed, but reference bits may be disturbed by external fields causing read errors
Solution Approach 1:
The patent applies preliminary action by performing a write verify sequence before normal read operations. The system writes test data to reference bits, verifies the write operation succeeded, and only then proceeds with normal reads. This preliminary verification prevents using disturbed reference bits, ensuring read accuracy while maintaining operation under external field conditions.
2Measurement precision
If double bit error detection is implemented, then tampering detection capability is improved, but detection of all failures is not guaranteed
Solution Approach 1:
The patent segments the error detection process into multiple independent verification stages: (1) write verify sequence that detects single bit errors, (2) dual read comparison that detects double bit errors, and (3) syndrome analysis that provides additional error detection. This segmentation allows each stage to target specific error types, achieving comprehensive failure detection while maintaining high tampering detection accuracy.
3Reliability
If reference bit disturbance occurs, then read errors increase, but recovery mechanisms are lacking
Solution Approach 1:
The patent implements self-service through automatic reference bit recovery mechanisms. When disturbance is detected via the write verify sequence or dual read comparison, the system automatically rewrites the reference bits with correct values and updates the midpoint reference. This self-recovery capability reduces error rates and restores reliability without external intervention, making the system resilient to reference bit disturbances.
Data Source
AI summary
A method and memory device is provided for reading data from an ECC word of a plurality of reference bits associated with a plurality of memory device bits and determining if a double bit error in the ECC word exists. The ECC word may be first toggled twice and the reference bits reset upon detecting the double bit error.