MRAM Ring MTJ Layout for Chip Area Reduction

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Solution Overview

Problem

Existing magnetoresistive random access memory (MRAM) devices face challenges such as high chip area, high cost, high power consumption, limited sensibility, and susceptibility to temperature variations.

Innovation Solution

A semiconductor device design featuring a substrate with an array region and a ring of magnetic tunneling junction (MTJ) regions surrounding the array region, with metal interconnect patterns overlapping parts of the MTJ regions, optimizing the layout to reduce chip area and improve performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a conventional MRAM device layout is used, then data retention capability is maintained, but chip area becomes large

Engineering Contradiction:
Improvechip areaVSAvoiddata retention capability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements a nested structure where the MTJ region is positioned within or adjacent to the array region, with the ring-shaped MTJ region surrounding part of the array region. This nesting approach allows the memory retention function to be integrated within the existing device footprint without requiring separate dedicated retention structures, thereby reducing overall chip area while maintaining data retention capability.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The ring-shaped MTJ region serves multiple functions: it provides magnetic retention for data storage, acts as a protective barrier against temperature variations, and enables enhanced sensing capability. By making the MTJ region multi-functional, the patent eliminates the need for separate retention structures, reducing chip area while maintaining reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Use of energy by stationary object

If conventional sensor structures are used, then basic sensing function is provided, but power consumption becomes high

Engineering Contradiction:
Improvepower consumptionVSAvoidsensing function
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The patent applies local quality by creating a ring-shaped MTJ region with specific magnetic properties positioned around the array region. This localized structure enhances sensing capability in the peripheral area while maintaining low power consumption by using the inherent magnetoresistive effect of the MTJ materials without requiring additional active components or continuous power supply for sensing operations.

Inventive Principle:
Principle #3Local quality

3Temperature

If standard device layout is used, then manufacturing is straightforward, but temperature stability becomes poor

Engineering Contradiction:
Improvetemperature stabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
TemperatureVSEase of manufacture

Solution Approach 1:

The ring-shaped MTJ region is positioned to surround the array region, creating a protective barrier that preemptively counteracts temperature variations before they can affect the core memory array. This preliminary protective structure uses the magnetoresistive properties of the MTJ materials to maintain stable operation across temperature ranges without requiring complex temperature compensation circuits or additional active control mechanisms.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design enhances the efficiency and reliability of MRAM devices by reducing chip area, lowering power consumption, and improving temperature stability, while maintaining data retention capabilities.

Implementation Method 1

Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 2

magnetic tunneling junction (MTJ) region

Methodology Applied
Scientific EffectQuantum tunneling:

Data Source

PatentUS20250204270A1Magnetoresistive random access memory having a ring of magnetic tunneling junction region surrounding an array region
Publication Date: 2025.06.19 UNITED MICROELECTRONICS CORP
  • US20250204270A1 patent drawing
  • US20250204270A1 patent drawing
  • US20250204270A1 patent drawing

AI summary

A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.