MRAM Memory Cell Self-Reference Read Circuit
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Solution Overview
Problem
MRAM memory devices face challenges in maintaining read margin due to narrowing resistance value distribution between '0' and '1' states, leading to decreased read accuracy.
Innovation Solution
A memory device employing a self-reference read method that performs a first read operation, followed by a '0' write operation to standardize the memory cell, and a second read operation to generate voltages used for determining the initial resistance state, with the preamplifier setting the node configured to generate the second voltage in a floating state during the '0' write operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a conventional read method is used, then the read operation is simple, but the read margin decreases due to narrowing resistance value distribution
Solution Approach 1:
The patent applies preliminary action by performing a first read operation before the final determination to obtain a reference voltage that reflects the initial resistance state. This preliminary read establishes a baseline against which the second read can be compared, enabling accurate determination of the resistance state change while compensating for distribution narrowing.
Solution Approach 2:
The patent implements feedback by using the voltage from the first read operation as a reference for determining the result of the second read operation. The comparison between the reference voltage (from first read) and the signal voltage (from second read) provides feedback that enables accurate determination of whether the resistance state changed, thereby maintaining read accuracy despite narrowing distribution.
2Measurement precision
If a self-reference read method with multiple operations is used, then read accuracy is maintained, but the read operation time increases
Solution Approach 1:
The patent applies periodic action by structuring the read operation as a sequence of discrete steps: first read operation, '0' write operation, second read operation, and determination operation. This periodic structure allows the system to efficiently alternate between different operational modes (reading, writing, comparing) to achieve accurate results while minimizing total operation time.
Solution Approach 2:
By performing the first read operation as a preliminary step that captures the initial state, the patent enables the subsequent determination process to be faster and more efficient. The preliminary action of storing the reference voltage allows the final determination to be made quickly by simple comparison, reducing the time penalty associated with the multi-step process.
3Measurement precision
If a self-reference read method is used, then read accuracy is improved, but the control complexity increases
Solution Approach 1:
The patent applies self-service by having the memory cell itself serve as the reference for its own state determination. The first read operation captures the initial state of the memory cell, and this captured state is then used as the reference for comparing against the second read operation result. This self-referential approach eliminates the need for external reference cells or complex reference generation circuitry, thereby reducing control complexity while maintaining high accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances read operation quality by simplifying control and speeding up the process, maintaining high accuracy even as resistance variations occur.
Implementation Method 1
An MRAM (Magnetoresistive Random Access Memory) is a memory device that uses a magnetic element with a magnetoresistive effect as a memory cell configured to store information
Data Source
AI summary
According to one embodiment, a memory device includes a memory cell; and a first circuit configured to perform first read for the memory cell and generate a first voltage, write first data to the memory cell that has undergone the first read, perform second read for the memory cell to which the first data is written and generate a second voltage, and determine data stored in the memory cell at the time of the first read based on the first voltage and the second voltage, wherein when writing the first data, the first circuit electrically sets a generation unit configured to generate the second voltage in a floating state.


