MRAM Built-In Self-Test Reference Trim Automation
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Solution Overview
Problem
Magnetoresistive Random Access Memory (MRAM) devices face challenges in reliable data read operations due to small resistivity separation between high and low resistive states, requiring costly and impractical external trim circuitry adjustments for reference resistance settings across varying environmental conditions.
Innovation Solution
A memory built-in self-test system performs a multiple-step process to set a reference trim range and select an optimal trim value by prompting the MRAM device to perform read operations under different trim positions, identifying failures to correctly sense data and adjusting the trim range accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external trim circuitry is used to adjust reference resistance, then data read reliability is improved, but device complexity and testing costs increase
Solution Approach 1:
The patent extracts the trim circuitry functionality from external components and integrates it directly into the memory device. The trim circuit is now built-in, allowing reference resistance adjustment without external components. This reduces device complexity while maintaining the ability to improve data read reliability through automated trimming processes.
Solution Approach 2:
The memory device performs self-trimming through built-in test circuits that automatically determine optimal reference resistance values. The device tests different trim values and selects the best one without requiring external testing equipment or manual intervention, thereby reducing both device complexity and testing costs while maintaining reliability.
2Measurement precision
If extensive external testing is performed to determine reference trim values, then measurement precision is improved, but loss of time and productivity decrease
Solution Approach 1:
The patent implements preliminary trimming action during manufacturing or initialization. The built-in self-test circuit determines optimal reference trim values in advance, storing them for later use. This eliminates the need for extensive external testing later, improving both measurement precision and productivity by performing the measurement early in the process.
Solution Approach 2:
The memory device autonomously performs its own trimming measurements using integrated test circuits. It evaluates different reference resistance values and automatically selects the optimal one without requiring external testing equipment or manual intervention. This self-service approach maintains measurement precision while dramatically improving testing efficiency and reducing time loss.
3Adaptability or versatility
If reference trim range is expanded to cover all conditions, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent segments the trim range into multiple discrete levels or steps rather than providing continuous adjustment. The trim circuit tests reference resistance at several predefined points across the range and selects the most appropriate one. This segmentation maintains adaptability to different environmental conditions while reducing circuit complexity compared to a fully continuous trim mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables automated and efficient setting of the reference trim, improving data read reliability and reducing costs associated with extensive testing across various conditions.
Implementation Method 1
A MRAM device can write data in a magnetic domain by setting the spin polarity of magnets in its free layer, for example, providing a spin-polarized current through Magnetic Tunnel Junction (MTJ), which exerts torque on local magnetization in the free layer, often called Spin Torque Transfer (STT).
Implementation Method 2
When the spin polarity is parallel to the pinned reference layer, a resistivity on a reference bit-line (BL) of the MRAM device can be deemed low and thus correspond to a data '0' value. When the spin polarity is perpendicular or anti-parallel to the pinned reference layer, the resistivity on the reference bit-line of the MRAM device can be deemed high and thus correspond to a data '1' value.
Data Source
AI summary
A memory device can sense stored data during memory read operations using a reference trim, and a memory built-in self-test system can perform a multiple step process to set the reference trim for the memory device. The memory built-in self-test system can set a reference trim range that corresponds to a range of available reference trim values and then select one of the reference trim values in the reference trim range as the reference trim for the memory device. The memory built-in self-test system can set the reference trim range by prompting performance of the memory read operations using different positions of the reference trim range relative to read characteristics of the memory device and set a position for the reference trim range relative to the read characteristics of the memory device based on failures of the memory device to correctly sense the stored data during the memory read operations.