MRAM Sense Amplifier Circuit for High-Speed Read Operations
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Solution Overview
Problem
Conventional MRAM technologies face challenges in achieving high-speed read operations due to small signal levels obtained from memory cells, which hinder data read speed and increase the size of read circuitry.
Innovation Solution
The implementation of a semiconductor memory device with memory cells incorporating serially-connected magnetoresistive elements and an amplifying member, such as an inverter, to amplify the signal generated by the magnetoresistive elements, and a sense amplifier circuit to identify data stored in the magnetoresistive elements, along with sub-sense amplifiers for hierarchical signal amplification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional read methods are used to identify cell data from current through the memory cell, then the read operation can be performed, but current-voltage conversion takes considerable time and the size of the read circuitry is undesirably increased
Solution Approach 1:
The patent replaces the conventional current-based read method with a voltage-based read method. Instead of measuring current through the memory cell and performing current-voltage conversion, the invention directly measures the voltage generated across the memory cell during read operation. This substitution eliminates the need for complex current-voltage conversion circuitry and reduces read operation time, as voltage can be directly amplified and processed without additional conversion steps.
2Speed
If voltage-based read method is used to identify cell data, then read speed can be improved, but the signal level obtained from the memory cell is not so large which makes it difficult to identify cell data
Solution Approach 1:
The patent merges multiple memory cells into a single string configuration where memory cells are connected in series between bitline and wordline. During read operation, the voltages generated by multiple memory cells are additive, resulting in a larger composite voltage signal that can be more easily detected and processed. This merging approach maintains high read speed while improving signal level through constructive addition of individual cell voltages.
Solution Approach 2:
The patent introduces a sense amplifier as an intermediary component between the memory cell string and the data output. The sense amplifier detects and amplifies the small voltage signal generated by the memory cell string, converting it into a robust digital signal that can be reliably processed. This intermediary component enables high-speed read operation while overcoming the limitation of small signal levels through active signal amplification.
3Measurement precision
If multiple memory cells are connected in series to increase signal level, then the voltage signal can be amplified, but the selectivity of memory cells in write operations may be affected
Solution Approach 1:
The patent employs dynamic control of transistor switching states to achieve proper memory cell selection during write operations. By dynamically controlling the gate voltages of access transistors and the timing of wordline activation, the system ensures that write current flows only through the specifically selected memory cell even when multiple cells are connected in series. This dynamic control mechanism maintains high selectivity and reliability while enabling voltage-based read operations with multiple series-connected cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high-speed read operations by amplifying the signal from magnetoresistive elements, reducing the overhead of read operations, and improving data read speed while maintaining efficient memory cell selectivity.
Implementation Method 1
In an MRAM memory cell, the resistance of a magnetic tunnel junction represents the cell data
Implementation Method 2
an amplifying member used to amplify a signal generated by a current through the one or more magnetoresistive element
Implementation Method 3
The sense amplifier circuit identifies data stored in the at least one magnetoresistive element in response to an output signal of the amplifying member
Data Source
AI summary
A semiconductor memory device is provided with a memory array including memory cells arranged in rows and columns; and a sense amplifier circuit. Each of the memory cells includes at least one magnetoresistive element storing data, and an amplifying member used to amplify a signal generated by a current through the at least one magnetoresistive element. The sense amplifier circuit identifies data stored in the at least one magnetoresistive element in response to an output signal of the amplifying member.