MRAM and SRAM Memory Subsystem for CNN AI Accelerator
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Solution Overview
Problem
Existing CNN-based digital ICs for AI are inefficient in processing large amounts of imagery data due to slow computational speed and high costs, as they often rely on software solutions or hardware designed for general computation, lacking optimized memory subsystems for storing filter coefficients and imagery data effectively.
Innovation Solution
A CNN-based digital IC with embedded memory subsystems comprising magnetic random access memory (MRAM) and static random access memory (SRAM) cells, where MRAM is used for storing weights and SRAM for input signals, utilizing spin transfer torque magnetic RAM (STT-RAM) or orthogonal spin transfer magnetic RAM (OST-MRAM) technology, and incorporating one-time-programming (OTP) memory for secure data storage, with techniques such as electric voltage and current manipulation to break down oxide barrier layers for OTP memory creation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If software solutions or general-purpose hardware are used for CNN processing, then implementation flexibility is maintained, but computational speed becomes too slow and cost becomes too high for processing large amounts of imagery data
Solution Approach 1:
The patent replaces traditional software-based or general-purpose hardware CNN processing with a specialized hardware accelerator that uses magnetic random access memory (MRAM) cells to directly perform convolution operations. This substitution of computational approach enables parallel processing of imagery data at hardware speed while integrating memory and processing functions to reduce system complexity.
Solution Approach 2:
The patent designs the MRAM-based CNN accelerator to handle multiple operations including convolution, activation functions, and data storage within a single integrated hardware structure. This multi-functional design improves computational speed by eliminating data transfer between separate components while managing system complexity through consolidation.
2Reliability
If filter coefficients are stored in memory for long time, then weight storage reliability is improved, but memory access speed for frequently updated imagery data may be compromised
Solution Approach 1:
The patent divides the memory system into two distinct segments: MRAM cells dedicated to storing filter coefficients (weights) with high retention reliability, and SRAM cells for storing and rapidly accessing imagery data. This segmentation allows each memory type to be optimized for its specific function, maintaining both reliability for weights and speed for imagery data access.
Solution Approach 2:
The patent applies different memory technologies to different data types based on their specific requirements: MRAM is used where long-term reliability is critical (weight storage), while SRAM is used where fast access is critical (imagery data storage and processing). This local quality approach ensures optimal performance for each data type without compromising the other.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances computational speed and reduces power consumption by optimizing memory access for AI processing, enabling efficient handling of large imagery data with scalable and secure memory solutions.
Implementation Method 1
The first memory is made of either spin transfer torque magnetic rand access memory (STT-RAM) or orthogonal spin transfer magnetic random access memory (OST-MRAM)
Implementation Method 2
techniques such as electric voltage and current manipulation to break down oxide barrier layers for OTP memory creation
Data Source
AI summary
CNN based digital IC for AI contains a number of CNN processing units. Each CNN processing unit contains CNN logic circuits operatively coupling to a memory subsystem having first and second memories. The first memory includes an array of magnetic random access memory (RAM) cells for storing weights (e.g., filter coefficients) and the second memory contains SRAM for storing input signals (e.g., imagery data). The first memory may store one-time-programming weights. The memory subsystem may contain a third memory that contains magnetic RAM cells for storing one-time-programming data for security purpose. The magnetic RAM includes STT-RAM or OST-MRAM in SLC or MLC technology.