MRAM Bit Cell Transistor Drive Voltage Offset for Body Effect

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Solution Overview

Problem

In magnetoresistive memory arrays, the varying distribution of resistance between bit cells and sensing circuits due to different locations along the bit line and source line introduces a body effect, which affects the accuracy of read operations by altering the current amplitude and resistance states, leading to operational problems and reduced selection rates.

Innovation Solution

The solution involves adjusting the switching voltages applied to the gates of bit cell transistors during read operations to offset the body effect by making the drive voltage specific to the word line address or using current level feedback control to maintain a consistent read current level, thereby accounting for the varying resistance distribution without needing to account for the word line address.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the bit line and source line lengths are varied to accommodate different bit cell locations, then the resistance distribution is optimized for each location, but the body effect varies with word line address causing operational problems

Engineering Contradiction:
Improveresistance distributionVSAvoidoperational accuracy
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the drive voltage applied to the switching transistors based on the word line address. The drive voltage is modified to compensate for the body effect that varies with the relative position of bit cells in the memory array, thereby maintaining consistent read current levels across different locations while preserving the optimized resistance distribution.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback control by using current level feedback to adjust the drive voltage. The feedback mechanism monitors the actual current level and modifies the drive voltage accordingly to maintain a target read current level, compensating for variations in bit line and source line resistance distribution without requiring explicit word line address accounting.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If the drive voltage is made specific to word line address to compensate for body effect, then read accuracy is improved, but device complexity increases

Engineering Contradiction:
Improveread accuracyVSAvoidcontrol complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses current level feedback control to eliminate the need for word line address-specific drive voltages. The feedback mechanism automatically adjusts the drive voltage based on actual current measurements, simplifying the control architecture while maintaining read accuracy across all word line addresses.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent creates a universal drive control mechanism that works for all word line addresses through feedback control. Instead of requiring separate drive voltage settings for different addresses, a single feedback-based control system handles all cases, reducing device complexity while maintaining precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If current level feedback control is used to maintain consistent read current, then body effect is accounted for without word line address dependency, but additional control circuitry is required

Engineering Contradiction:
Improveaddress independenceVSAvoidcontrol circuitry
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements current level feedback control that automatically adapts the drive voltage to maintain consistent read current levels. This feedback mechanism provides address independence by continuously monitoring and adjusting current based on actual circuit conditions, eliminating the need for explicit address-dependent control while requiring additional feedback circuitry.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8923040B2Accommodating balance of bit line and source line resistances in magnetoresistive random access memory
Publication Date: 2014.12.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8923040B2 patent drawing
  • US8923040B2 patent drawing
  • US8923040B2 patent drawing

AI summary

A memory has magnetic tunnel junction elements with different resistances in different logic states, for bit positions in memory words accessed by a word line signal coupling each bit cell in the addressed word between a bit line and source line for that bit position. The bit lines and source lines are longer and shorter at different word line locations, causing a resistance body effect. A clamping transistor couples the bit line to a sensing circuit when reading, applying a current through the bit cell and producing a read voltage compared by the sensing circuit to a reference such as a comparable voltage from a reference bit cell circuit having a similar structure. A drive control varies an input to the switching transistor as a function of the word line location, e.g., by word line address, to offset the different bit and source line resistances.