MRAM Cell With Unidirectional Selectors for Density
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Solution Overview
Problem
The scaling of MRAM array density is limited by the size of selector transistors, which are larger than MTJ bit cells, and the use of bidirectional selectors complicates the design, making it difficult to achieve high density while minimizing leakage via sneak paths.
Innovation Solution
Employing two unidirectional selectors (diodes) per MTJ bit cell with three terminals per unit cell, allowing for simultaneous writing of 0 and 1 to different bits along one word line, and using unidirectional selectors that are simpler to manufacture in the back-end-of-line process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If bidirectional selectors are used for MTJ bit cells, then data can be read and written, but device complexity increases and leakage via sneak paths increases
Solution Approach 1:
The bidirectional selector is segmented into two separate unidirectional selectors (first unidirectional selector and second unidirectional selector) that operate in opposite directions. This segmentation allows independent control of current flow paths, enabling data reading and writing operations while reducing complexity by replacing a single complex bidirectional device with two simpler unidirectional devices.
Solution Approach 2:
Instead of using a bidirectional selector that handles both reading and writing functions, the patent inverts the approach by using two unidirectional selectors with opposite current flow directions. The first unidirectional selector conducts current in one direction for reading, while the second unidirectional selector conducts current in the opposite direction for writing, thereby simplifying each selector's design while maintaining full functionality.
2Ease of operation
If selector transistors are made larger to handle bidirectional operations, then data can be read and written, but MRAM array density decreases
Solution Approach 1:
The bidirectional selector function is segmented into two separate unidirectional selectors. Each unidirectional selector can be implemented with smaller transistor structures since they only need to handle current flow in one direction, rather than requiring the larger transistor area needed for bidirectional operation. This segmentation enables higher array density while maintaining full data reading and writing capabilities.
Solution Approach 2:
The patent inverts the conventional approach by using two unidirectional selectors with opposite current directions instead of a single bidirectional selector. This inversion allows each selector to be smaller in area, as unidirectional current control requires less transistor area than bidirectional control, thereby increasing the overall MRAM array density.
3Ease of manufacture
If unidirectional selectors are used per bit cell, then manufacturing complexity is reduced, but more selectors are needed per cell
Solution Approach 1:
The bidirectional selector is segmented into two unidirectional selectors, which are simpler to manufacture in the back-end-of-line process. Although the number of selector devices per cell increases from one to two, each individual selector is easier to fabricate, and the overall manufacturing process is simplified due to the standardization of unidirectional selector structures that can be produced using conventional CMOS techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances MRAM array density by simplifying the selector design, reducing leakage, and enabling efficient data writing operations, while maintaining the performance of MRAM cells with MTJ film stacks.
Implementation Method 1
An MRAM cell is formed by a magnetic tunneling junction (MTJ) comprising two ferromagnetic layers which are separated by a thin insulating barrier, and operates by tunneling of electrons between the two ferromagnetic layers through the insulating barrier.
Implementation Method 2
Each of the multiple cells includes a memory cell stack, a first diode having an anode coupled to another end of the memory cell stack and a cathode coupled to the first main word line, and a second diode having a cathode coupled to the another end of the memory cell stack and an anode coupled to the first associate word line.
Data Source
AI summary
A memory cell includes a memory cell stack, a first word line, a second word line, a bit line coupled to one end of the memory cell stack, a first unidirectional selector having one end coupled to another end of the memory cell stack and another end coupled to the first word line, and a second unidirectional selector having one end coupled to the another end of the memory cell stack and another end coupled to the second word line. Current flow directions of the first unidirectional selector and the second unidirectional selector are opposite to each other.