MRAM On-Chip Power Regulation for Fast Voltage Settling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional low-dropout (LDO) regulators struggle to maintain a stable output voltage with fast transient response and low leakage current, especially in memory devices that require precise voltage regulation and quick recovery from idle mode, due to varying load conditions.
Innovation Solution
The implementation of output level clamper sets, including pull-up, pull-down circuits, and charge injectors, along with power gate switches, dynamically monitors and adjusts the output voltage to reduce settling time, suppress overshoot and undershoot, and minimize leakage, using active-feedback mechanisms and distributed configurations across loads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional LDO regulators are used, then voltage regulation is provided, but fast transient response and low leakage current cannot be achieved simultaneously
Solution Approach 1:
The patent applies preliminary action by pre-charging capacitive loads through charge injector circuits before the main power switch closes. This pre-charging action prepares the load for rapid power delivery, enabling fast transient response without compromising voltage stability. The charge injectors are activated in advance to reduce the settling time when the regulator transitions from idle to active mode.
Solution Approach 2:
The patent segments the power delivery function into multiple independent components: charge injector circuits, power gate switches, and level clamper sets. Each segment handles specific aspects of transient response control, allowing them to operate independently and simultaneously improve response speed while maintaining voltage stability through coordinated action.
2Reliability
If output voltage is regulated tightly, then voltage stability is improved, but settling time increases
Solution Approach 1:
The level clamper sets perform preliminary voltage adjustment by clamping the output voltage to predetermined levels during transient conditions. This preliminary action prevents large voltage deviations that would otherwise require long settling times, enabling the regulator to achieve both tight voltage control and fast settling by doing the heavy lifting before the main regulation loop fully engages.
Solution Approach 2:
The charge injector circuits act as intermediary elements between the power source and the load. They provide an intermediate charging mechanism that prepares the load voltage before the main LDO regulator takes over, thereby reducing the settling time required for the final voltage stabilization without compromising the tightness of the voltage regulation.
3Loss of time
If power gate switches are used for quick mode transition, then recovery time from idle mode is reduced, but leakage current increases
Solution Approach 1:
The patent applies local quality by implementing separate, dedicated charge injector circuits for each power gate switch. Each injector is locally optimized to provide precise charge control only where needed, enabling the power gates to transition quickly from idle to active mode while minimizing leakage current in non-active regions. This localized approach allows fast recovery without the penalty of system-wide leakage increases.
Data Source
AI summary
In an embodiment, a voltage regulation circuit includes a regulation circuit with a voltage regulator that provides an output voltage and a control circuit, coupled to the voltage regulator. The control circuit pulls up the output voltage to a reference voltage responsive to the control circuit detecting that a first voltage level of the output voltage is lower than a predefined voltage level. The control circuit decouples the output voltage from the reference voltage responsive to the control circuit detecting that the first voltage level of the output voltage is higher than the predefined voltage level.


